高速应用的封装技术评价与优化

L. Lo, B. E. Cheah
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引用次数: 1

摘要

本文分析了标准和无芯封装在高达100Gbps数据速率下的电气性能。本研究探讨了封装设计属性(如衬底核心厚度、镀通孔(PTH)衬垫尺寸和第二级互连(SLI)几何形状)对插入损耗性能的影响。本研究还评估了一种具有金属网格阵列(MGA) SLI的替代无芯封装解决方案的电气性能,以实现超薄和小尺寸电子器件。除了具有可配置和可扩展SLI几何结构的优势外,全波电磁仿真结果显示,随着频率的增加,MGA无芯封装的插入损耗性能显著改善。本文分析了不同封装方案中插入损耗下降的根本原因,并进行了进一步的讨论。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Package technology evaluation and optimization for high-speed applications
This paper analyzes the electrical performance of standard and coreless packages up-to 100Gbps data rate. The impact of package design attributes e.g. substrate core thickness, plated through hole (PTH) pad dimension and geometry of second level interconnect (SLI) on insertion loss performance are explored in this study. This study also evaluates the electrical performance of an alternative coreless package solution with metal grid array (MGA) SLI to enable ultra-thin and small form factor electronic devices. In addition to the advantages of configurable and scalable SLI geometry, the full-wave electromagnetic simulation results shows significant insertion loss performance improvement with MGA coreless package as the frequency increases. The root-causes of insertion loss degradations among the evaluated packaging solutions were identified and further discussed in this paper.
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