Marko Magerl, C. Stockreiter, O. Eisenberger, R. Minixhofer, A. Barić
{"title":"建立可互换的集成电路黑盒模型用于电磁兼容仿真","authors":"Marko Magerl, C. Stockreiter, O. Eisenberger, R. Minixhofer, A. Barić","doi":"10.1109/EMCCOMPO.2015.7358368","DOIUrl":null,"url":null,"abstract":"An interchangeable black-box model of an integrated circuit block for time-domain simulations of the direct power injection (DPI) immunity test is presented. An artificial neural network implemented as a Verilog A module is used to build a model of a bandgap reference circuit sub-block. Being a part of a larger schematic of interconnected circuit blocks, the model is able to correctly load the transistor-level block in the previous stage. The simulation time for the transient analysis is significantly improved compared to the transistor-level models, and the time-to-steady-state of the model is negligible. The accuracy of the model is comparable to the state-of-the-art black-box modelling approaches. The model is very practical for obtaining the EMC behaviour of complex integrated circuits at design-time.","PeriodicalId":236992,"journal":{"name":"2015 10th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"Building interchangeable black-box models of integrated circuits for EMC simulations\",\"authors\":\"Marko Magerl, C. Stockreiter, O. Eisenberger, R. Minixhofer, A. Barić\",\"doi\":\"10.1109/EMCCOMPO.2015.7358368\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An interchangeable black-box model of an integrated circuit block for time-domain simulations of the direct power injection (DPI) immunity test is presented. An artificial neural network implemented as a Verilog A module is used to build a model of a bandgap reference circuit sub-block. Being a part of a larger schematic of interconnected circuit blocks, the model is able to correctly load the transistor-level block in the previous stage. The simulation time for the transient analysis is significantly improved compared to the transistor-level models, and the time-to-steady-state of the model is negligible. The accuracy of the model is comparable to the state-of-the-art black-box modelling approaches. The model is very practical for obtaining the EMC behaviour of complex integrated circuits at design-time.\",\"PeriodicalId\":236992,\"journal\":{\"name\":\"2015 10th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo)\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-12-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 10th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EMCCOMPO.2015.7358368\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 10th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EMCCOMPO.2015.7358368","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Building interchangeable black-box models of integrated circuits for EMC simulations
An interchangeable black-box model of an integrated circuit block for time-domain simulations of the direct power injection (DPI) immunity test is presented. An artificial neural network implemented as a Verilog A module is used to build a model of a bandgap reference circuit sub-block. Being a part of a larger schematic of interconnected circuit blocks, the model is able to correctly load the transistor-level block in the previous stage. The simulation time for the transient analysis is significantly improved compared to the transistor-level models, and the time-to-steady-state of the model is negligible. The accuracy of the model is comparable to the state-of-the-art black-box modelling approaches. The model is very practical for obtaining the EMC behaviour of complex integrated circuits at design-time.