{"title":"面向系统级设计的异构mpsoc任务映射","authors":"K. Vivekanandarajah, S. K. Pilakkat","doi":"10.1109/ICECCS.2008.18","DOIUrl":null,"url":null,"abstract":"This paper investigates automatic mapping of application-to-architecture in heterogeneous Multi Processor System on a Chip (MPSoC), a key problem in system level design of embedded systems. An algorithm is proposed to optimally solve this application-to-architecture mapping problem. The proposed algorithm uses efficient branch-and-bound approach to partition the problem into sub problems and solves them. In addition, we also propose simple heuristics for generating good initial solution and bounds such that the convergence of branch and bound algorithm is fast. Our experiments with randomly generated benchmarks show that the proposed algorithm is efficient and able to map the application-to-architecture with less number of branching.","PeriodicalId":186804,"journal":{"name":"13th IEEE International Conference on Engineering of Complex Computer Systems (iceccs 2008)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-03-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"Task Mapping in Heterogeneous MPSoCs for System Level Design\",\"authors\":\"K. Vivekanandarajah, S. K. Pilakkat\",\"doi\":\"10.1109/ICECCS.2008.18\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper investigates automatic mapping of application-to-architecture in heterogeneous Multi Processor System on a Chip (MPSoC), a key problem in system level design of embedded systems. An algorithm is proposed to optimally solve this application-to-architecture mapping problem. The proposed algorithm uses efficient branch-and-bound approach to partition the problem into sub problems and solves them. In addition, we also propose simple heuristics for generating good initial solution and bounds such that the convergence of branch and bound algorithm is fast. Our experiments with randomly generated benchmarks show that the proposed algorithm is efficient and able to map the application-to-architecture with less number of branching.\",\"PeriodicalId\":186804,\"journal\":{\"name\":\"13th IEEE International Conference on Engineering of Complex Computer Systems (iceccs 2008)\",\"volume\":\"40 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-03-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"13th IEEE International Conference on Engineering of Complex Computer Systems (iceccs 2008)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECCS.2008.18\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"13th IEEE International Conference on Engineering of Complex Computer Systems (iceccs 2008)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECCS.2008.18","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Task Mapping in Heterogeneous MPSoCs for System Level Design
This paper investigates automatic mapping of application-to-architecture in heterogeneous Multi Processor System on a Chip (MPSoC), a key problem in system level design of embedded systems. An algorithm is proposed to optimally solve this application-to-architecture mapping problem. The proposed algorithm uses efficient branch-and-bound approach to partition the problem into sub problems and solves them. In addition, we also propose simple heuristics for generating good initial solution and bounds such that the convergence of branch and bound algorithm is fast. Our experiments with randomly generated benchmarks show that the proposed algorithm is efficient and able to map the application-to-architecture with less number of branching.