基于VectorBlox MXP矩阵处理器的fpga嵌入式超级计算

Aaron Severance, G. Lemieux
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引用次数: 64

摘要

嵌入式系统经常使用fpga来执行高度并行的数据处理任务。然而,构建这样的系统通常需要使用VHDL或Verilog的专门硬件设计技能。相反,本文介绍了VectorBlox MXP矩阵处理器,一种基于fpga的软处理器,能够高度并行执行。MXP完全用C语言编程,能够以类似硬件的速度执行数据并行软件算法。例如,运行在200MHz或更高频率的MXP可以实现多抽头FIR滤波器,每个时钟周期输出1个元素。MXP的参数化设计允许用户指定所需的并行量,范围从1到128或更多并行alu。MXP的主要特点包括一个并行访问的刮刮板存储器,用于存储矢量数据和高吞吐量DMA和分散/收集引擎。为了提供极致的性能,处理器是可扩展的自定义矢量指令和自定义DMA滤波器。最后,MXP与现有的Altera和Xilinx开发流程无缝连接,简化了系统创建和部署。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Embedded supercomputing in FPGAs with the VectorBlox MXP Matrix Processor
Embedded systems frequently use FPGAs to perform highly parallel data processing tasks. However, building such a system usually requires specialized hardware design skills with VHDL or Verilog. Instead, this paper presents the VectorBlox MXP Matrix Processor, an FPGA-based soft processor capable of highly parallel execution. Programmed entirely in C, the MXP is capable of executing data-parallel software algorithms at hardware-like speeds. For example, the MXP running at 200MHz or higher can implement a multi-tap FIR filter and output 1 element per clock cycle. MXP's parameterized design lets the user specify the amount of parallelism required, ranging from 1 to 128 or more parallel ALUs. Key features of the MXP include a parallel-access scratchpad memory to hold vector data and high-throughput DMA and scatter/gather engines. To provide extreme performance, the processor is expandable with custom vector instructions and custom DMA filters. Finally, the MXP seamlessly ties into existing Altera and Xilinx development flows, simplifying system creation and deployment.
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