使用DEVS范例实现一个模拟处理器

Proceedings 33rd Annual Simulation Symposium (SS 2000) Pub Date : 2000-04-16 DOI:10.1109/SIMSYM.2000.844901

Sergio Daicz, Alejandro J. Troccoli, S. Zlotnik, Gabriel A. Wainer

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引用次数: 1

摘要

本文主要介绍了一种具有教育用途的模拟计算机alfa - 1的设计与实现。DEVS形式化被用来解决设计的复杂性，允许定义单个组件，这些组件可以最近集成到建模层次结构中。该工具是为计算机体系结构和组织课程设计的。它的目标是让学生通过仿真在硬件组件的设计和实现方面获得一些实践。

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Using the DEVS paradigm to implement a simulated processor

This work is devoted to present the design and implementation of Alfa-I, a simulated computer with educational purposes. The DEVS formalism was used to attack the complexity of the design, allowing the definition of individual components that can be lately integrated into a modelling hierarchy. The tool is designed for the use in Computer Architecture and Organization courses. Its goal is allowing the students to acquire some practice in the design and implementation of hardware components by using simulation.

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Proceedings 33rd Annual Simulation Symposium (SS 2000)

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