{"title":"优化ESD电路保护器件的性能","authors":"H. Hyatt, J. Harris, J. Colby, P. Bellew","doi":"10.1109/EOSESD.2000.890025","DOIUrl":null,"url":null,"abstract":"Decision-making methods for choosing ESD circuit protection remain poorly understood. Selecting an IC which passed ESD device level testing does not guarantee that a particular circuit using that device will survive ESD events. We present an optimization methodology for assessment of ESD circuit protection.","PeriodicalId":332394,"journal":{"name":"Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No.00TH8476)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Optimizing the performance of ESD circuit protection devices\",\"authors\":\"H. Hyatt, J. Harris, J. Colby, P. Bellew\",\"doi\":\"10.1109/EOSESD.2000.890025\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Decision-making methods for choosing ESD circuit protection remain poorly understood. Selecting an IC which passed ESD device level testing does not guarantee that a particular circuit using that device will survive ESD events. We present an optimization methodology for assessment of ESD circuit protection.\",\"PeriodicalId\":332394,\"journal\":{\"name\":\"Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No.00TH8476)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-09-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No.00TH8476)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EOSESD.2000.890025\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No.00TH8476)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EOSESD.2000.890025","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optimizing the performance of ESD circuit protection devices
Decision-making methods for choosing ESD circuit protection remain poorly understood. Selecting an IC which passed ESD device level testing does not guarantee that a particular circuit using that device will survive ESD events. We present an optimization methodology for assessment of ESD circuit protection.