晶圆与晶圆之间的混合键合和细间距的考虑

Thomas Workman, L. Mirkarimi, J. Theil, G. Fountain, K.M. Bang, Bongsub Lee, C. Uzoh, D. Suwito, Guilian Gao, P. Mrozek
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引用次数: 6

摘要

随着半导体行业规划下一代封装,需要高带宽架构来实现改进的计算性能需求,混合键合正变得越来越重要。$< \mathrm{35}\ \mu \mathrm{m}$级焊料互连的可扩展性挑战推动了混合键合技术的采用,这是一种具有增强可扩展性的技术。直接键合互连(DBI®)技术最初是为晶圆到晶圆(W2W)应用而开发的,现已扩展到晶圆到晶圆(D2W),成为DBI®Ultra。本文讨论了一种新型晶圆混合键合试验车的试验结果,该试验车采用$2\ \mu\mathrm{m}$衬垫在$4\ \mu\mathrm{m}$节上的互连设计。8毫米× 12毫米的芯片包含菊花链测试结构,从126,000到1,600,000个链接。采用常规的隐形切割方法对元件晶片进行单晶化,然后在带架上进行加工,制备D2W键合。$2\ \mu\mathrm{m}$键合垫要求在拾取和放置工具内的亚微米对准精度为100% alignment yield. However, due to bonder availability, our initial trials were bonded on a Besi Chameo Advanced bonder with an ISO 3 bonding environment and an alignment accuracy of $+/- 3\ \mu\mathrm{m} (3 \sigma)$. The bond quality is characterized with C-mode scanning acoustic microscopy (CSAM), electrical resistance measurement, and cross-section microscopy analysis. The bond yield is shared as a function of bond defect density and electrical yield. Daisy chain yield and resistance versus misalignment for the fine pitch test vehicle are compared to test vehicles having a $10\ \mu\mathrm{m}$ pad on $40\ \mu\mathrm{m}$ pitch. The implications of the 10x pitch shrink on process control from wafer and die fabrication are discussed.
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Die to Wafer Hybrid Bonding and Fine Pitch Considerations
Hybrid bonding is becoming increasingly important as the semiconductor industry plans for the next generation of packaging where high bandwidth architectures are required to achieve improved compute performance demands. The scalability challenges in solder-based interconnects at $< \mathrm{35}\ \mu \mathrm{m}$ pitch has fueled the adoption of hybrid bonding as a technology with enhanced scalability. The direct bond interconnect (DBI®) technology which was developed originally for wafer to wafer (W2W) applications has been extended to die to wafer (D2W) as DBI® Ultra. In this paper, we discuss the test results for a new die to wafer hybrid bonding test vehicle with an interconnect design of $2\ \mu\mathrm{m}$ pad on $4\ \mu\mathrm{m}$ pitch. The 8 mm by 12 mm chip contains daisy chain test structures ranging from 126,000 to 1,600,000 links. The component die wafers were singulated with conventional stealth dicing and then processed on tape frame for preparation of D2W bonding. The $2\ \mu\mathrm{m}$ bond pad requires sub-micron alignment accuracy within the pick and place tool for 100% alignment yield. However, due to bonder availability, our initial trials were bonded on a Besi Chameo Advanced bonder with an ISO 3 bonding environment and an alignment accuracy of $+/- 3\ \mu\mathrm{m} (3 \sigma)$. The bond quality is characterized with C-mode scanning acoustic microscopy (CSAM), electrical resistance measurement, and cross-section microscopy analysis. The bond yield is shared as a function of bond defect density and electrical yield. Daisy chain yield and resistance versus misalignment for the fine pitch test vehicle are compared to test vehicles having a $10\ \mu\mathrm{m}$ pad on $40\ \mu\mathrm{m}$ pitch. The implications of the 10x pitch shrink on process control from wafer and die fabrication are discussed.
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