M. Maccanelli, A. Halliday, B. Bell, D. Steiss, K. Butler
{"title":"在芯片和板级自动故障诊断的实际应用","authors":"M. Maccanelli, A. Halliday, B. Bell, D. Steiss, K. Butler","doi":"10.1109/DFTVS.1992.224345","DOIUrl":null,"url":null,"abstract":"As the sizes of electronic products grow larger, the process of diagnosing failed components becomes increasingly complex. The problem is compounded by the fact that there exists no unified system with which to diagnose problems at all levels of the product design-integrated circuit (IC), printed circuit board (PCB), and system. This paper presents the results of an industrial experiment with techniques for automating the diagnosis process. The authors have developed a prototype automated fault diagnosis (AFD) system which can input a fault dictionary from either of two different commercial ATPG systems along with results from test pattern application and produce a list of candidate defect sites within a given circuit. The authors ran the prototype against simulated single and multiple stuck-at faults in a portion of a commercial floating point unit and at the PCB level using a special test PCB. Results have been encouraging in that the authors have obtained fairly accurate diagnoses with relatively low coverage stuck-at fault sets and in the presence of simulated non-classical defects. It is possible to produce a uniform methodology for AFD at the IC and PCB levels.<<ETX>>","PeriodicalId":319218,"journal":{"name":"Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Practical application of automated fault diagnosis at the chip and board levels\",\"authors\":\"M. Maccanelli, A. Halliday, B. Bell, D. Steiss, K. Butler\",\"doi\":\"10.1109/DFTVS.1992.224345\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As the sizes of electronic products grow larger, the process of diagnosing failed components becomes increasingly complex. The problem is compounded by the fact that there exists no unified system with which to diagnose problems at all levels of the product design-integrated circuit (IC), printed circuit board (PCB), and system. This paper presents the results of an industrial experiment with techniques for automating the diagnosis process. The authors have developed a prototype automated fault diagnosis (AFD) system which can input a fault dictionary from either of two different commercial ATPG systems along with results from test pattern application and produce a list of candidate defect sites within a given circuit. The authors ran the prototype against simulated single and multiple stuck-at faults in a portion of a commercial floating point unit and at the PCB level using a special test PCB. Results have been encouraging in that the authors have obtained fairly accurate diagnoses with relatively low coverage stuck-at fault sets and in the presence of simulated non-classical defects. It is possible to produce a uniform methodology for AFD at the IC and PCB levels.<<ETX>>\",\"PeriodicalId\":319218,\"journal\":{\"name\":\"Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-11-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFTVS.1992.224345\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1992.224345","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Practical application of automated fault diagnosis at the chip and board levels
As the sizes of electronic products grow larger, the process of diagnosing failed components becomes increasingly complex. The problem is compounded by the fact that there exists no unified system with which to diagnose problems at all levels of the product design-integrated circuit (IC), printed circuit board (PCB), and system. This paper presents the results of an industrial experiment with techniques for automating the diagnosis process. The authors have developed a prototype automated fault diagnosis (AFD) system which can input a fault dictionary from either of two different commercial ATPG systems along with results from test pattern application and produce a list of candidate defect sites within a given circuit. The authors ran the prototype against simulated single and multiple stuck-at faults in a portion of a commercial floating point unit and at the PCB level using a special test PCB. Results have been encouraging in that the authors have obtained fairly accurate diagnoses with relatively low coverage stuck-at fault sets and in the presence of simulated non-classical defects. It is possible to produce a uniform methodology for AFD at the IC and PCB levels.<>