一种降低开关电容降压DC-DC变换器输出纹波的新方法

Conference Record of the 2004 IEEE Industry Applications Conference, 2004. 39th IAS Annual Meeting. Pub Date : 2004-11-01 DOI:10.1109/IAS.2004.1348552

Jifeng Han, A. von Jouane, G. Temes

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引用次数: 1

摘要

快速下降的电源电压和严格的电压调节要求集成电路挑战电源设计人员。针对降压开关电容DC-DC变换器的输出纹波问题，提出了一种新的交错放电方法。四级SC DC-DC变换器的仿真和实验结果表明，TD方法可以将输出纹波减小三倍。所提出的ID方法还使转换器效率提高了7%。ID方法适用于所有降压SC DC-DC变换器，并提供了设计优化的灵活性。

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A new approach to reducing output ripple in switched-capacitor-based step-down DC-DC converters

Rapidly dropping power supply voltages and tight voltage regulation requirements for integrated circuits challenge power supply designers. A novel interleaved discharging (ID) approach is presented to reduce the output ripple in step-down switched-capacitor (SC) DC-DC converters. Simulation and experimental results of a four-stage SC DC-DC converter show that the TD approach can reduce the output ripple by a factor of three. The proposed ID approach also improves the converter efficiency by 7%. The ID approach is suitable for all step-down SC DC-DC converters and provides flexibility in design optimization.

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Conference Record of the 2004 IEEE Industry Applications Conference, 2004. 39th IAS Annual Meeting.

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