VDSL调制解调器在systemc2.0 - ipsim中的高级建模与仿真

The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings. Pub Date : 2003-07-22 DOI:10.1109/IWSOC.2003.1213030

A. Armaroli, M. Coppola, M. Diaz-Nava, L. Fanucci

{"title":"VDSL调制解调器在systemc2.0 - ipsim中的高级建模与仿真","authors":"A. Armaroli, M. Coppola, M. Diaz-Nava, L. Fanucci","doi":"10.1109/IWSOC.2003.1213030","DOIUrl":null,"url":null,"abstract":"In order to deal with present System on Chip design complexity and short time to market, system level specification/verification techniques and reusable Intellectual Property cores are key factors. To this aim, system level C++ object oriented methodology named IPsim has been developed as a C++ library on top SystemC 2.0. In this paper, the IPsim modeling and simulation of a VDSL modem is presented. Moreover, quantitative comparison between IPsim and behavioral VHDL simulation speed is also performed.","PeriodicalId":259178,"journal":{"name":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"High level modeling and simulation of a VDSL modem in SystemC 2.0-IPsim\",\"authors\":\"A. Armaroli, M. Coppola, M. Diaz-Nava, L. Fanucci\",\"doi\":\"10.1109/IWSOC.2003.1213030\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In order to deal with present System on Chip design complexity and short time to market, system level specification/verification techniques and reusable Intellectual Property cores are key factors. To this aim, system level C++ object oriented methodology named IPsim has been developed as a C++ library on top SystemC 2.0. In this paper, the IPsim modeling and simulation of a VDSL modem is presented. Moreover, quantitative comparison between IPsim and behavioral VHDL simulation speed is also performed.\",\"PeriodicalId\":259178,\"journal\":{\"name\":\"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-07-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWSOC.2003.1213030\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2003.1213030","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 1

摘要

为了解决当前片上系统设计的复杂性和上市时间短的问题，系统级规范/验证技术和可重用的知识产权核心是关键因素。为此，系统级c++面向对象方法IPsim作为一个c++库被开发在SystemC 2.0之上。本文介绍了一种VDSL调制解调器的IPsim建模与仿真方法。此外，还对IPsim和行为VHDL仿真速度进行了定量比较。

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High level modeling and simulation of a VDSL modem in SystemC 2.0-IPsim

In order to deal with present System on Chip design complexity and short time to market, system level specification/verification techniques and reusable Intellectual Property cores are key factors. To this aim, system level C++ object oriented methodology named IPsim has been developed as a C++ library on top SystemC 2.0. In this paper, the IPsim modeling and simulation of a VDSL modem is presented. Moreover, quantitative comparison between IPsim and behavioral VHDL simulation speed is also performed.

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The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.

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