{"title":"电荷泵锁相环的脉冲注入背景校准技术","authors":"Ximing Fu, K. El-Sankary, Yadong Yin","doi":"10.1109/newcas49341.2020.9159782","DOIUrl":null,"url":null,"abstract":"This paper presents a new technique for minimizing spurs in charge-pump phase-locked loop (PLL) using pulse injection (PI) technique. The proposed background calibration uses pulse injection in parallel with the normal operation of the PLL during its unlocked phase to extract the charge pump current mismatch error. The mismatch extraction is implemented using an error integrator and a successive approximation register (SAR) controller configured in a negative feedback to perform background calibration during the normal operation of the PLL. A windowing clock is used to extract only the error caused by the injected pulses and maintain the control voltage dc level outside of the window. Upon completion of calibration, the injection pulses are stopped and the PLL continues its operation in the lock state with minimized spur. The proposed technique successfully achieves fast calibration without interrupting the normal operation of the PLL. The simulation results show good improvements of spur reduction stemmed from the charge-pump.","PeriodicalId":135163,"journal":{"name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A Pulse injection background calibration technique for charge pump PLLs\",\"authors\":\"Ximing Fu, K. El-Sankary, Yadong Yin\",\"doi\":\"10.1109/newcas49341.2020.9159782\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new technique for minimizing spurs in charge-pump phase-locked loop (PLL) using pulse injection (PI) technique. The proposed background calibration uses pulse injection in parallel with the normal operation of the PLL during its unlocked phase to extract the charge pump current mismatch error. The mismatch extraction is implemented using an error integrator and a successive approximation register (SAR) controller configured in a negative feedback to perform background calibration during the normal operation of the PLL. A windowing clock is used to extract only the error caused by the injected pulses and maintain the control voltage dc level outside of the window. Upon completion of calibration, the injection pulses are stopped and the PLL continues its operation in the lock state with minimized spur. The proposed technique successfully achieves fast calibration without interrupting the normal operation of the PLL. The simulation results show good improvements of spur reduction stemmed from the charge-pump.\",\"PeriodicalId\":135163,\"journal\":{\"name\":\"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/newcas49341.2020.9159782\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/newcas49341.2020.9159782","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Pulse injection background calibration technique for charge pump PLLs
This paper presents a new technique for minimizing spurs in charge-pump phase-locked loop (PLL) using pulse injection (PI) technique. The proposed background calibration uses pulse injection in parallel with the normal operation of the PLL during its unlocked phase to extract the charge pump current mismatch error. The mismatch extraction is implemented using an error integrator and a successive approximation register (SAR) controller configured in a negative feedback to perform background calibration during the normal operation of the PLL. A windowing clock is used to extract only the error caused by the injected pulses and maintain the control voltage dc level outside of the window. Upon completion of calibration, the injection pulses are stopped and the PLL continues its operation in the lock state with minimized spur. The proposed technique successfully achieves fast calibration without interrupting the normal operation of the PLL. The simulation results show good improvements of spur reduction stemmed from the charge-pump.