一种用于脑卒中患者实时语音转换的40nm CMOS SoC

2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC) Pub Date : 2022-01-17 DOI:10.1109/ASP-DAC52403.2022.9712584

Tay-Jyi Lin, Chen-Zong Liao, You-Jia Hu, Wei-Cheng Hsu, Zheng-Xian Wu, Shao-Yu Wang, Chun-Ming Huang, Ying-Hui Lai, C. Yeh, Jinn-Shyan Wang

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引用次数: 0

摘要

本文首次提出了一种能够将脑卒中患者的语音实时转换为更清晰易懂的语音的语音转换芯片。该SoC由一个RISC-V MPU和一个带有单个16位乘法累加器的紧凑型DNN引擎组成，性能提高了12倍，能效提高了100倍，并已在40nm CMOS上实现。硅面积为0.68×0.79mm2，在0.5秒内(200MHz和0.8V)转换3秒的异常声音时，测量功率为18.4mW，转换< 1秒(100MHz和0.6V)时，测量功率为4.8mW。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 40nm CMOS SoC for Real-Time Dysarthric Voice Conversion of Stroke Patients

This paper presents the first dysarthric voice conversion SoC, which can translate stroke patients' voice into more intelligible and clearer speech in real time. The SoC is composed of a RISC-V MPU and a compact DNN engine with a single 16-bit multiply-accumulator, which improves 12x performance and > 100x energy efficiency, and has been implemented in 40nm CMOS. The silicon area is 0.68×0.79mm2, and the measured power is 18.4mW for converting 3-sec dysarthric voice within 0.5 sec (at 200MHz and 0.8V) and 4.8mW for conversion < 1 sec (at 100MHz and 0.6V).

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2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)

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