考虑子模块电容动态的MMC-HVDC链路通用平均值建模

S. Nanou, S. Papathanassiou
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引用次数: 8

摘要

本文的主要目的是为商业高压直流输电(HVDC)应用中使用的最先进的模块化多电平变换器(MMC)拓扑结构提出一个通用的平均值模型。所提出的模型不仅依赖于基频建模方法,而且还考虑了实际MMC电路拓扑中每臂串联的子模块电容器的预期动态行为。该模型包括六个受控电压源,连接在每个变换器臂上,由等效子模块电容器的动态控制,再现预期的电压纹波,以及每个变换器臂内产生的循环电流。为了评估所提出的均值MMC模型的准确性,通过Matlab/Simulink中的时域仿真,在正常运行和存在电网故障的情况下,与详细的切换模型进行了比较评估。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Generic average-value modeling of MMC-HVDC links considering submodule capacitor dynamics
The main objective of this paper is to propose a generic average-value model for the state-of-the-art modular multilevel converter (MMC) topology used in commercial high voltage dc transmission (HVDC) applications. The proposed model does not rely solely on the fundamental frequency modeling approach, but it also takes into account the expected dynamic behavior of submodule capacitors connected in series in each arm of the actual MMC circuit topology. The model includes six controlled voltage sources, connected in each converter arm, which are governed by the dynamics of an equivalent submodule capacitor, reproducing the expected voltage ripple, as well as the circulating currents induced inside each converter arm. To evaluate the accuracy of the proposed average-value MMC model, a comparative assessment is performed against the detailed switching model, via time-domain simulations in Matlab/Simulink, under normal operation and in the presence of grid faults.
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