{"title":"用两个CMOS CCII+s实现零电平","authors":"D. Moro-Frías, E. Tlelo-Cuautle","doi":"10.1109/ICEEE.2013.6676070","DOIUrl":null,"url":null,"abstract":"The nullor element is implemented herein by using two positive-type second generation current conveyors (CCII+s). The CCII+s are designed using standard CMOS integrated circuit technology of 0.35μm. The main advantage is the very low parasitic resistance of the CCII+ at terminal X (RX), in order to accomplish the ideal behavior of the nullor. HSPICE simulation results are provided and the usefulness of the designed nullor is highlighted through the implementation of a current-mode universal filter and a sinusoidal oscillator.","PeriodicalId":226547,"journal":{"name":"2013 10th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Realization of the nullor using two CMOS CCII+s\",\"authors\":\"D. Moro-Frías, E. Tlelo-Cuautle\",\"doi\":\"10.1109/ICEEE.2013.6676070\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The nullor element is implemented herein by using two positive-type second generation current conveyors (CCII+s). The CCII+s are designed using standard CMOS integrated circuit technology of 0.35μm. The main advantage is the very low parasitic resistance of the CCII+ at terminal X (RX), in order to accomplish the ideal behavior of the nullor. HSPICE simulation results are provided and the usefulness of the designed nullor is highlighted through the implementation of a current-mode universal filter and a sinusoidal oscillator.\",\"PeriodicalId\":226547,\"journal\":{\"name\":\"2013 10th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-12-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 10th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEEE.2013.6676070\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 10th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEEE.2013.6676070","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The nullor element is implemented herein by using two positive-type second generation current conveyors (CCII+s). The CCII+s are designed using standard CMOS integrated circuit technology of 0.35μm. The main advantage is the very low parasitic resistance of the CCII+ at terminal X (RX), in order to accomplish the ideal behavior of the nullor. HSPICE simulation results are provided and the usefulness of the designed nullor is highlighted through the implementation of a current-mode universal filter and a sinusoidal oscillator.