{"title":"用于技术和商业环境的新MP硬件架构","authors":"Loren Staley","doi":"10.1109/CMPCON.1995.512375","DOIUrl":null,"url":null,"abstract":"In the computer business, most new product designs are driven by the need to reduce the price and/or increase the performance of a customer valued set of functionality. By creating such products, vendors remain competitive and profitable. In a product line, like the HP 3000 or HP 9000, products at the low end will be designed with an emphasis on low cost, while products at the high end will emphasize performance. This paper describes a new, hardware architecture for both high end clients and midrange servers where managing cost and achieving high performance contend with each other and must be balanced in order to create the desired products. The system architecture described takes into account the technology trend of using microprocessors with superscaler and/or speculative execution pipelines in a symmetric multiprocessor (SMP) system. The characteristics of this trend demand that all other system components provide enough parallelism so that the entire system will perform well. However, providing parallel paths naturally works against managing cost. What follows are the results of an effort to create a high performance, cost effective SMP architecture which provides both technical and commercial users with an attractive set of products.","PeriodicalId":415918,"journal":{"name":"Digest of Papers. COMPCON'95. Technologies for the Information Superhighway","volume":"104 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-03-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A new MP HW architecture for technical and commercial environments\",\"authors\":\"Loren Staley\",\"doi\":\"10.1109/CMPCON.1995.512375\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In the computer business, most new product designs are driven by the need to reduce the price and/or increase the performance of a customer valued set of functionality. By creating such products, vendors remain competitive and profitable. In a product line, like the HP 3000 or HP 9000, products at the low end will be designed with an emphasis on low cost, while products at the high end will emphasize performance. This paper describes a new, hardware architecture for both high end clients and midrange servers where managing cost and achieving high performance contend with each other and must be balanced in order to create the desired products. The system architecture described takes into account the technology trend of using microprocessors with superscaler and/or speculative execution pipelines in a symmetric multiprocessor (SMP) system. The characteristics of this trend demand that all other system components provide enough parallelism so that the entire system will perform well. However, providing parallel paths naturally works against managing cost. What follows are the results of an effort to create a high performance, cost effective SMP architecture which provides both technical and commercial users with an attractive set of products.\",\"PeriodicalId\":415918,\"journal\":{\"name\":\"Digest of Papers. COMPCON'95. Technologies for the Information Superhighway\",\"volume\":\"104 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-03-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Digest of Papers. COMPCON'95. Technologies for the Information Superhighway\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CMPCON.1995.512375\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Papers. COMPCON'95. Technologies for the Information Superhighway","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CMPCON.1995.512375","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new MP HW architecture for technical and commercial environments
In the computer business, most new product designs are driven by the need to reduce the price and/or increase the performance of a customer valued set of functionality. By creating such products, vendors remain competitive and profitable. In a product line, like the HP 3000 or HP 9000, products at the low end will be designed with an emphasis on low cost, while products at the high end will emphasize performance. This paper describes a new, hardware architecture for both high end clients and midrange servers where managing cost and achieving high performance contend with each other and must be balanced in order to create the desired products. The system architecture described takes into account the technology trend of using microprocessors with superscaler and/or speculative execution pipelines in a symmetric multiprocessor (SMP) system. The characteristics of this trend demand that all other system components provide enough parallelism so that the entire system will perform well. However, providing parallel paths naturally works against managing cost. What follows are the results of an effort to create a high performance, cost effective SMP architecture which provides both technical and commercial users with an attractive set of products.