{"title":"北斗导航递推最小二乘抗干扰算法及FPGA实现","authors":"Tao Luo, Peng Chen, Zongxin Wang, Yuhuan Zhang","doi":"10.1109/icet55676.2022.9825090","DOIUrl":null,"url":null,"abstract":"The signal of Beidou navigation satellite is very weak when it is received by the users, and it is easily interfered by intentional or unintentional interferences. Blind interference suppression technology represented by power inversion (PI) algorithm is studied and can effectively suppress the interference under the condition of unknown interference direction by optimizing the beamforming weights to improve the signal to interference plus noise ratio (SINR). Taking anti-interference performance and implementation complexity as indicators, a PI algorithm implementation structure based on field programmable gate array (FPGA) is proposed to develop digital systems and build an anti-interference algorithm implementation system efficiently. Simulation results of sample matrix inversion (SMI), least mean square error (LMS) and recursive least square (RLS) algorithm, in four-element linear array with half-wavelength array spacing, are given respectively. The results show that the RLS algorithm has faster convergence speed than the LMS algorithm, and has less computational complexity than the SMI. In FPGA measurement, the anti-interference performance can reach about 80 dB and 70 dB respectively for single and triple broadband interferences.","PeriodicalId":166358,"journal":{"name":"2022 IEEE 5th International Conference on Electronics Technology (ICET)","volume":"125 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Recursive Least Square Anti-Jamming Algorithm and FPGA Implementation for BeiDou Navigation\",\"authors\":\"Tao Luo, Peng Chen, Zongxin Wang, Yuhuan Zhang\",\"doi\":\"10.1109/icet55676.2022.9825090\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The signal of Beidou navigation satellite is very weak when it is received by the users, and it is easily interfered by intentional or unintentional interferences. Blind interference suppression technology represented by power inversion (PI) algorithm is studied and can effectively suppress the interference under the condition of unknown interference direction by optimizing the beamforming weights to improve the signal to interference plus noise ratio (SINR). Taking anti-interference performance and implementation complexity as indicators, a PI algorithm implementation structure based on field programmable gate array (FPGA) is proposed to develop digital systems and build an anti-interference algorithm implementation system efficiently. Simulation results of sample matrix inversion (SMI), least mean square error (LMS) and recursive least square (RLS) algorithm, in four-element linear array with half-wavelength array spacing, are given respectively. The results show that the RLS algorithm has faster convergence speed than the LMS algorithm, and has less computational complexity than the SMI. In FPGA measurement, the anti-interference performance can reach about 80 dB and 70 dB respectively for single and triple broadband interferences.\",\"PeriodicalId\":166358,\"journal\":{\"name\":\"2022 IEEE 5th International Conference on Electronics Technology (ICET)\",\"volume\":\"125 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-05-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE 5th International Conference on Electronics Technology (ICET)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/icet55676.2022.9825090\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 5th International Conference on Electronics Technology (ICET)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/icet55676.2022.9825090","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Recursive Least Square Anti-Jamming Algorithm and FPGA Implementation for BeiDou Navigation
The signal of Beidou navigation satellite is very weak when it is received by the users, and it is easily interfered by intentional or unintentional interferences. Blind interference suppression technology represented by power inversion (PI) algorithm is studied and can effectively suppress the interference under the condition of unknown interference direction by optimizing the beamforming weights to improve the signal to interference plus noise ratio (SINR). Taking anti-interference performance and implementation complexity as indicators, a PI algorithm implementation structure based on field programmable gate array (FPGA) is proposed to develop digital systems and build an anti-interference algorithm implementation system efficiently. Simulation results of sample matrix inversion (SMI), least mean square error (LMS) and recursive least square (RLS) algorithm, in four-element linear array with half-wavelength array spacing, are given respectively. The results show that the RLS algorithm has faster convergence speed than the LMS algorithm, and has less computational complexity than the SMI. In FPGA measurement, the anti-interference performance can reach about 80 dB and 70 dB respectively for single and triple broadband interferences.