{"title":"椭圆曲线数字签名算法在Koblitz曲线上的硬件实现","authors":"Nabil Ghanmy, N. Khlif, L. Chaari, L. Kamoun","doi":"10.1109/CSNDSP.2012.6292648","DOIUrl":null,"url":null,"abstract":"This paper presents Elliptic Curve Digital Signature Algorithm (ECDSA) hardware implementation over Koblitz subfield curves with 163-bit key length. We designed ECDSA with the purpose to improve performance and security respectively by using elliptic curve point multiplication on Koblitz curves to compute the public key and a key stream generator “W7” to generate private key. Different blocs of ECDSA are implemented on a reconfigurable hardware platform (Xilinx xc6vlx760-2ff1760). We used the hardware description language VHDL (VHSIC Hardware Description Language) for compartmental validation. The design requires 0.2 ms, 0.8 ms and 0.4 ms with 7 %, 13 % and 5 % of the device resources on Slice LUT for respectively key generation, signature generation and signature verification. The proposed ECDSA implementation is suitable to the applications that need: low-bandwidth communication, low-storage and low-computation environments. In particular our implementation is suitable to smart cards and wireless devices.","PeriodicalId":222283,"journal":{"name":"International Symposium on Communication Systems, Networks and Digital Signal Processing","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"Hardware implementation of elliptic curve digital signature algorithm (ECDSA) on Koblitz curves\",\"authors\":\"Nabil Ghanmy, N. Khlif, L. Chaari, L. Kamoun\",\"doi\":\"10.1109/CSNDSP.2012.6292648\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents Elliptic Curve Digital Signature Algorithm (ECDSA) hardware implementation over Koblitz subfield curves with 163-bit key length. We designed ECDSA with the purpose to improve performance and security respectively by using elliptic curve point multiplication on Koblitz curves to compute the public key and a key stream generator “W7” to generate private key. Different blocs of ECDSA are implemented on a reconfigurable hardware platform (Xilinx xc6vlx760-2ff1760). We used the hardware description language VHDL (VHSIC Hardware Description Language) for compartmental validation. The design requires 0.2 ms, 0.8 ms and 0.4 ms with 7 %, 13 % and 5 % of the device resources on Slice LUT for respectively key generation, signature generation and signature verification. The proposed ECDSA implementation is suitable to the applications that need: low-bandwidth communication, low-storage and low-computation environments. In particular our implementation is suitable to smart cards and wireless devices.\",\"PeriodicalId\":222283,\"journal\":{\"name\":\"International Symposium on Communication Systems, Networks and Digital Signal Processing\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Symposium on Communication Systems, Networks and Digital Signal Processing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSNDSP.2012.6292648\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Symposium on Communication Systems, Networks and Digital Signal Processing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSNDSP.2012.6292648","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hardware implementation of elliptic curve digital signature algorithm (ECDSA) on Koblitz curves
This paper presents Elliptic Curve Digital Signature Algorithm (ECDSA) hardware implementation over Koblitz subfield curves with 163-bit key length. We designed ECDSA with the purpose to improve performance and security respectively by using elliptic curve point multiplication on Koblitz curves to compute the public key and a key stream generator “W7” to generate private key. Different blocs of ECDSA are implemented on a reconfigurable hardware platform (Xilinx xc6vlx760-2ff1760). We used the hardware description language VHDL (VHSIC Hardware Description Language) for compartmental validation. The design requires 0.2 ms, 0.8 ms and 0.4 ms with 7 %, 13 % and 5 % of the device resources on Slice LUT for respectively key generation, signature generation and signature verification. The proposed ECDSA implementation is suitable to the applications that need: low-bandwidth communication, low-storage and low-computation environments. In particular our implementation is suitable to smart cards and wireless devices.