X4CP32:一种新的并行/可重构通用处理器

Proceedings. 15th Symposium on Computer Architecture and High Performance Computing Pub Date : 2003-11-10 DOI:10.1109/CAHPC.2003.1250346

R. Soares, A. Azevedo, Ivan Saraiva Silva

{"title":"X4CP32:一种新的并行/可重构通用处理器","authors":"R. Soares, A. Azevedo, Ivan Saraiva Silva","doi":"10.1109/CAHPC.2003.1250346","DOIUrl":null,"url":null,"abstract":"The X4CP32 is a parallel/reconfigurable microprocessor with 2 programming levels. Although it is a general-purpose microprocessor, it has the reliable performance of a reconfigurable architecture. We expose its architecture and programming levels, and discuss the powerful interaction between parallel programming and reconfiguration. It shows two performance-optimized implementations of matrix multiplication using both parallel and reconfigurable paradigms and a parallel implementation of miner intelligent agents.","PeriodicalId":433002,"journal":{"name":"Proceedings. 15th Symposium on Computer Architecture and High Performance Computing","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"X4CP32: a new parallel/reconfigurable general-purpose processor\",\"authors\":\"R. Soares, A. Azevedo, Ivan Saraiva Silva\",\"doi\":\"10.1109/CAHPC.2003.1250346\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The X4CP32 is a parallel/reconfigurable microprocessor with 2 programming levels. Although it is a general-purpose microprocessor, it has the reliable performance of a reconfigurable architecture. We expose its architecture and programming levels, and discuss the powerful interaction between parallel programming and reconfiguration. It shows two performance-optimized implementations of matrix multiplication using both parallel and reconfigurable paradigms and a parallel implementation of miner intelligent agents.\",\"PeriodicalId\":433002,\"journal\":{\"name\":\"Proceedings. 15th Symposium on Computer Architecture and High Performance Computing\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-11-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. 15th Symposium on Computer Architecture and High Performance Computing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CAHPC.2003.1250346\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 15th Symposium on Computer Architecture and High Performance Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CAHPC.2003.1250346","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

X4CP32是一种并行/可重构微处理器，具有2个编程级别。虽然它是一个通用微处理器，但它具有可重构体系结构的可靠性能。我们揭示了它的体系结构和编程层次，并讨论了并行编程和重构之间的强大交互。它展示了使用并行和可重构范式的两种性能优化的矩阵乘法实现，以及矿工智能代理的并行实现。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

X4CP32: a new parallel/reconfigurable general-purpose processor

The X4CP32 is a parallel/reconfigurable microprocessor with 2 programming levels. Although it is a general-purpose microprocessor, it has the reliable performance of a reconfigurable architecture. We expose its architecture and programming levels, and discuss the powerful interaction between parallel programming and reconfiguration. It shows two performance-optimized implementations of matrix multiplication using both parallel and reconfigurable paradigms and a parallel implementation of miner intelligent agents.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings. 15th Symposium on Computer Architecture and High Performance Computing

自引率

0.00%

发文量