成像系统芯片制造成本的模型

C. C. Wells, E. Duncan, D. Renshaw
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引用次数: 1

摘要

本文描述了将CMOS图像传感器集成到片上系统(SoC)时所面临的一些问题。本文提出了一种简单的方法,利用现成的信息源来估计几种硅工艺下成像soc的制造成本。提出了一种集成DSP的低成本成像SoC,并计算了其制造成本。结果表明,对于给出的例子,0.18 /spl mu/m或更小的工艺在50万单位时才开始比每单位2.80美元的旧工艺更经济。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A model for imaging system-on-chip manufacturing costs
This work describes some of the issues faced when integrating a CMOS image sensor into a system-on-chip (SoC). A simple method is proposed for estimating the manufacturing costs of imaging SoCs at several silicon processes using readily available information sources. A low-cost imaging SoC with integral DSP is presented and its manufacturing cost calculated. The results indicated that for the example given, processes of 0.18 /spl mu/m or smaller only start to become more economical than older processes at $2.80 per unit for 500k units.
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