{"title":"高性能宽带数字预失真平台,适用于3G+应用,在40mhz带宽下优于55dBc","authors":"A. Kwan, O. Hammi, M. Helaoui, F. Ghannouchi","doi":"10.1109/MWSYM.2010.5518033","DOIUrl":null,"url":null,"abstract":"In this paper, a hardware-software system is proposed for the wideband characterization and linearization of power amplifiers exhibiting memory effects. The designed prototype includes a signal generation and a feedback paths for applications in the 1GHz to 2.5GHz frequency band and supports instantaneous bandwidths of up to 60MHz. The hardware platform is coupled with a software interface that implements the required data processing algorithms for the synthesis of the digital predistortion function. Experimental validation is carried out on a 3G power amplifier driven by an eight-carrier WCDMA signal. The digital predistortion is implemented using the twin-nonlinear two-box model with only 30 parameters and leads to a better than 55dBc ACLR for an input signal having 40MHz instantaneous bandwidth. To the best of the authors' knowledge this represents the best digital predistortion performances in terms of bandwidth and complexity.","PeriodicalId":341557,"journal":{"name":"2010 IEEE MTT-S International Microwave Symposium","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2010-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"High performance wideband digital predistortion platform for 3G+ applications with better than 55dBc over 40 MHz bandwidth\",\"authors\":\"A. Kwan, O. Hammi, M. Helaoui, F. Ghannouchi\",\"doi\":\"10.1109/MWSYM.2010.5518033\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a hardware-software system is proposed for the wideband characterization and linearization of power amplifiers exhibiting memory effects. The designed prototype includes a signal generation and a feedback paths for applications in the 1GHz to 2.5GHz frequency band and supports instantaneous bandwidths of up to 60MHz. The hardware platform is coupled with a software interface that implements the required data processing algorithms for the synthesis of the digital predistortion function. Experimental validation is carried out on a 3G power amplifier driven by an eight-carrier WCDMA signal. The digital predistortion is implemented using the twin-nonlinear two-box model with only 30 parameters and leads to a better than 55dBc ACLR for an input signal having 40MHz instantaneous bandwidth. To the best of the authors' knowledge this represents the best digital predistortion performances in terms of bandwidth and complexity.\",\"PeriodicalId\":341557,\"journal\":{\"name\":\"2010 IEEE MTT-S International Microwave Symposium\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-05-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 IEEE MTT-S International Microwave Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSYM.2010.5518033\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE MTT-S International Microwave Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSYM.2010.5518033","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High performance wideband digital predistortion platform for 3G+ applications with better than 55dBc over 40 MHz bandwidth
In this paper, a hardware-software system is proposed for the wideband characterization and linearization of power amplifiers exhibiting memory effects. The designed prototype includes a signal generation and a feedback paths for applications in the 1GHz to 2.5GHz frequency band and supports instantaneous bandwidths of up to 60MHz. The hardware platform is coupled with a software interface that implements the required data processing algorithms for the synthesis of the digital predistortion function. Experimental validation is carried out on a 3G power amplifier driven by an eight-carrier WCDMA signal. The digital predistortion is implemented using the twin-nonlinear two-box model with only 30 parameters and leads to a better than 55dBc ACLR for an input signal having 40MHz instantaneous bandwidth. To the best of the authors' knowledge this represents the best digital predistortion performances in terms of bandwidth and complexity.