寄生双极晶体管对缩放垂直功率dmosfet性能和可靠性的影响

Proceedings of 1995 International Conference on Power Electronics and Drive Systems. PEDS 95 Pub Date : 1995-02-21 DOI:10.1109/PEDS.1995.404914

K. Fischer, K. Shenai

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引用次数: 3

摘要

硅化垂直双扩散MOSFET (DMOSFET)固有的寄生双极晶体管严重影响其性能和可靠性。报道了具有TiSi/sub 2/ source触点的缩放低压功率dmosfet，并观察到输出I-V特性中的异常“扭结”。结果表明，TiSi/sub 2/触点对p体扩散的高接触电阻导致了高输出电导。本文利用二维器件模拟器详细研究了寄生双极晶体管对规模化硅化功率mosfet静态和动态开关特性的影响。采用混合器件和电路模拟器来确定双极参数对器件在电阻和非箝位电感开关(UIS)条件下开关特性的影响。研究表明，为了抑制寄生双极晶体管引起的有害效应，在开发下一代比例功率MOS技术时，需要一个浅层表面扩散的p/sup +/区域。

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The effect of parasitic bipolar transistor on the performance and reliability of scaled vertical power DMOSFETs

The parasitic bipolar transistor inherent in the silicided vertical double diffused MOSFET (DMOSFET) can greatly affect its performance and reliability. Scaled low-voltage power DMOSFETs with TiSi/sub 2/ source contacts were reported and anomalous "kinks" in the output I-V characteristics were observed. It was shown that a high contact resistance of TiSi/sub 2/ contacts to the p-body diffusion caused the high output conductance. In this paper, a two-dimensional (2D) device simulator was used to investigate in detail the impact of the parasitic bipolar transistor on the static and dynamic switching characteristics of scaled silicided power MOSFETs. A mixed device and circuit simulator was used to determine the effect of bipolar parameters on the switching characteristics of devices under resistive and unclamped inductive switching (UIS) conditions. It is shown that a shallow surface-diffused p/sup +/ region is necessary to suppress the parasitic bipolar transistor-induced deleterious effects in developing the next generation of scaled power MOS technologies.<>

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Proceedings of 1995 International Conference on Power Electronics and Drive Systems. PEDS 95

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