{"title":"数字硬件设计的开源流程综述","authors":"M. Chupilko, A. Kamkin, S. Smolov","doi":"10.1109/ivmem53963.2021.00008","DOIUrl":null,"url":null,"abstract":"This paper considers open-source tools for the logical-synthesis and place-and-route hardware design stages. Several flows (CADs), including qFlow, OpenLANE, Coriolis, VTR, and SymbiFlow, have been described. For experimental evaluation of these flows, two RISC-V implementations have been used: schoolRISCV and PicoRV32. The results show that open-source flows are capable to produce physical layouts for realistic examples. At the same time, commercial CADs allow generating more effective designs in terms of clock frequency.","PeriodicalId":360766,"journal":{"name":"2021 Ivannikov Memorial Workshop (IVMEM)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Survey of Open-source Flows for Digital Hardware Design\",\"authors\":\"M. Chupilko, A. Kamkin, S. Smolov\",\"doi\":\"10.1109/ivmem53963.2021.00008\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper considers open-source tools for the logical-synthesis and place-and-route hardware design stages. Several flows (CADs), including qFlow, OpenLANE, Coriolis, VTR, and SymbiFlow, have been described. For experimental evaluation of these flows, two RISC-V implementations have been used: schoolRISCV and PicoRV32. The results show that open-source flows are capable to produce physical layouts for realistic examples. At the same time, commercial CADs allow generating more effective designs in terms of clock frequency.\",\"PeriodicalId\":360766,\"journal\":{\"name\":\"2021 Ivannikov Memorial Workshop (IVMEM)\",\"volume\":\"17 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 Ivannikov Memorial Workshop (IVMEM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ivmem53963.2021.00008\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 Ivannikov Memorial Workshop (IVMEM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ivmem53963.2021.00008","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Survey of Open-source Flows for Digital Hardware Design
This paper considers open-source tools for the logical-synthesis and place-and-route hardware design stages. Several flows (CADs), including qFlow, OpenLANE, Coriolis, VTR, and SymbiFlow, have been described. For experimental evaluation of these flows, two RISC-V implementations have been used: schoolRISCV and PicoRV32. The results show that open-source flows are capable to produce physical layouts for realistic examples. At the same time, commercial CADs allow generating more effective designs in terms of clock frequency.
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