We Chang, G. Luo, Yi-Shuo Huang, C. Chu, Yao-Jen Lee, Bo-Yuan Chen, Chun-Hsiung Lin, Wen-Fa Wu, W. Yeh
{"title":"选择性蚀刻相同外延层制备SiGe和Si栅极全能场效应管","authors":"We Chang, G. Luo, Yi-Shuo Huang, C. Chu, Yao-Jen Lee, Bo-Yuan Chen, Chun-Hsiung Lin, Wen-Fa Wu, W. Yeh","doi":"10.1109/EDTM53872.2022.9797991","DOIUrl":null,"url":null,"abstract":"Due to the higher hole mobility and free of dislocations, the SiGe channel is more practical than the Ge channel for the industrial to push technology nodes further. In this work, the SiGe Gate-All-Around (GAA) p-FETs and Si GAA n-FETs were fabricated on the same Si/SiGe multilayer epitaxial wafer for the first time. The SiGe and Si multi-bridge channels (MBC) were respectively formed by Si interlayers selective etching and SiGe interlayers selective etching. For improving interface quality between Si and high-k, both Si and SiGe surfaces were processed with H2O2 treatment and forming gas (FG) annealing before the high-k gate deposition. The process scheme in this work can be easily applied to integrate SiGe GAA p-FETs and Si GAA n-FETs on the same wafer.","PeriodicalId":158478,"journal":{"name":"2022 6th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"SiGe and Si Gate-All-Around FET Fabricated by Selective Etching the Same Epitaxial Layers\",\"authors\":\"We Chang, G. Luo, Yi-Shuo Huang, C. Chu, Yao-Jen Lee, Bo-Yuan Chen, Chun-Hsiung Lin, Wen-Fa Wu, W. Yeh\",\"doi\":\"10.1109/EDTM53872.2022.9797991\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Due to the higher hole mobility and free of dislocations, the SiGe channel is more practical than the Ge channel for the industrial to push technology nodes further. In this work, the SiGe Gate-All-Around (GAA) p-FETs and Si GAA n-FETs were fabricated on the same Si/SiGe multilayer epitaxial wafer for the first time. The SiGe and Si multi-bridge channels (MBC) were respectively formed by Si interlayers selective etching and SiGe interlayers selective etching. For improving interface quality between Si and high-k, both Si and SiGe surfaces were processed with H2O2 treatment and forming gas (FG) annealing before the high-k gate deposition. The process scheme in this work can be easily applied to integrate SiGe GAA p-FETs and Si GAA n-FETs on the same wafer.\",\"PeriodicalId\":158478,\"journal\":{\"name\":\"2022 6th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-03-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 6th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDTM53872.2022.9797991\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 6th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDTM53872.2022.9797991","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
SiGe and Si Gate-All-Around FET Fabricated by Selective Etching the Same Epitaxial Layers
Due to the higher hole mobility and free of dislocations, the SiGe channel is more practical than the Ge channel for the industrial to push technology nodes further. In this work, the SiGe Gate-All-Around (GAA) p-FETs and Si GAA n-FETs were fabricated on the same Si/SiGe multilayer epitaxial wafer for the first time. The SiGe and Si multi-bridge channels (MBC) were respectively formed by Si interlayers selective etching and SiGe interlayers selective etching. For improving interface quality between Si and high-k, both Si and SiGe surfaces were processed with H2O2 treatment and forming gas (FG) annealing before the high-k gate deposition. The process scheme in this work can be easily applied to integrate SiGe GAA p-FETs and Si GAA n-FETs on the same wafer.