{"title":"具有共享内存层次结构的dvfs -多核系统的高效能量驱动调度","authors":"Jalil Boudjadar","doi":"10.1109/DISTRA.2017.8167661","DOIUrl":null,"url":null,"abstract":"Nowadays, multicore platforms are being widely used for the deployment of embedded systems due to their potential in terms of processing capacity. However, the resulting interleaving and memory interference make real-time guarantees of safety critical systems hard to be delivered. Beside to safety requirements, energy consumption represents a strong constraint for the deployment of such systems as they operate on energy-limited sources. Dynamic Voltage and Frequency Scaling (DVFS) was introduced as a technology to reduce the energy consumption of systems by tuning the frequency of processing cores according to the workload. One way of improving schedulability could be by running all cores with maximum frequency. Nevertheless, it has been proved in the literature that this solution is not optimal because it drains the battery energy and leads to eternal bottleneck as the number of memory requests increases linearly with the cores frequency. In this paper, we introduce a framework for fine grained specification and formal analysis of the schedulability and performance of DVFS-multicore systems having a hierarchy of shared memories. We design a collaborative scheduling algorithm to reduce the energy consumption and improve cores utilization. Our collaborative scheduling technique drives the scheduling of a core according to the adopted policy and the resulting memory interference. To that end, our framework provides the ability to run other ready tasks, when the current running tasks fall in a dense memory interference queue, rather than stalling on the memory interference.","PeriodicalId":109971,"journal":{"name":"2017 IEEE/ACM 21st International Symposium on Distributed Simulation and Real Time Applications (DS-RT)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"An efficient energy-driven scheduling of DVFS-multicore systems with a hierarchy of shared memories\",\"authors\":\"Jalil Boudjadar\",\"doi\":\"10.1109/DISTRA.2017.8167661\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Nowadays, multicore platforms are being widely used for the deployment of embedded systems due to their potential in terms of processing capacity. However, the resulting interleaving and memory interference make real-time guarantees of safety critical systems hard to be delivered. Beside to safety requirements, energy consumption represents a strong constraint for the deployment of such systems as they operate on energy-limited sources. Dynamic Voltage and Frequency Scaling (DVFS) was introduced as a technology to reduce the energy consumption of systems by tuning the frequency of processing cores according to the workload. One way of improving schedulability could be by running all cores with maximum frequency. Nevertheless, it has been proved in the literature that this solution is not optimal because it drains the battery energy and leads to eternal bottleneck as the number of memory requests increases linearly with the cores frequency. In this paper, we introduce a framework for fine grained specification and formal analysis of the schedulability and performance of DVFS-multicore systems having a hierarchy of shared memories. We design a collaborative scheduling algorithm to reduce the energy consumption and improve cores utilization. Our collaborative scheduling technique drives the scheduling of a core according to the adopted policy and the resulting memory interference. To that end, our framework provides the ability to run other ready tasks, when the current running tasks fall in a dense memory interference queue, rather than stalling on the memory interference.\",\"PeriodicalId\":109971,\"journal\":{\"name\":\"2017 IEEE/ACM 21st International Symposium on Distributed Simulation and Real Time Applications (DS-RT)\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-10-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE/ACM 21st International Symposium on Distributed Simulation and Real Time Applications (DS-RT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DISTRA.2017.8167661\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE/ACM 21st International Symposium on Distributed Simulation and Real Time Applications (DS-RT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DISTRA.2017.8167661","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An efficient energy-driven scheduling of DVFS-multicore systems with a hierarchy of shared memories
Nowadays, multicore platforms are being widely used for the deployment of embedded systems due to their potential in terms of processing capacity. However, the resulting interleaving and memory interference make real-time guarantees of safety critical systems hard to be delivered. Beside to safety requirements, energy consumption represents a strong constraint for the deployment of such systems as they operate on energy-limited sources. Dynamic Voltage and Frequency Scaling (DVFS) was introduced as a technology to reduce the energy consumption of systems by tuning the frequency of processing cores according to the workload. One way of improving schedulability could be by running all cores with maximum frequency. Nevertheless, it has been proved in the literature that this solution is not optimal because it drains the battery energy and leads to eternal bottleneck as the number of memory requests increases linearly with the cores frequency. In this paper, we introduce a framework for fine grained specification and formal analysis of the schedulability and performance of DVFS-multicore systems having a hierarchy of shared memories. We design a collaborative scheduling algorithm to reduce the energy consumption and improve cores utilization. Our collaborative scheduling technique drives the scheduling of a core according to the adopted policy and the resulting memory interference. To that end, our framework provides the ability to run other ready tasks, when the current running tasks fall in a dense memory interference queue, rather than stalling on the memory interference.