{"title":"$log_{2}N$交换fabric的硬件控制器和模拟器","authors":"M. Michalski","doi":"10.1109/icccn58024.2023.10230150","DOIUrl":null,"url":null,"abstract":"This paper presents the idea of a hardware controller for a switching fabric of $log_{2}N$, where a complicated algorithm is implemented in the Xilinx FPGA Virtex5 chip. This implementation is time-efficient and allows for real control of network traffic for DCN/EON electrical and optical networks. Simulations and human-based analysis can also be performed using this design. It can serve as a calculating engine for SDN/OF networks. Three different boards with two types of Virtex5 FPGA chips from Xilinx were used as the hardware platform.","PeriodicalId":132030,"journal":{"name":"2023 32nd International Conference on Computer Communications and Networks (ICCCN)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Hardware Controller and Simulator for $log_{2}N$ Switching Fabrics\",\"authors\":\"M. Michalski\",\"doi\":\"10.1109/icccn58024.2023.10230150\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the idea of a hardware controller for a switching fabric of $log_{2}N$, where a complicated algorithm is implemented in the Xilinx FPGA Virtex5 chip. This implementation is time-efficient and allows for real control of network traffic for DCN/EON electrical and optical networks. Simulations and human-based analysis can also be performed using this design. It can serve as a calculating engine for SDN/OF networks. Three different boards with two types of Virtex5 FPGA chips from Xilinx were used as the hardware platform.\",\"PeriodicalId\":132030,\"journal\":{\"name\":\"2023 32nd International Conference on Computer Communications and Networks (ICCCN)\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 32nd International Conference on Computer Communications and Networks (ICCCN)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/icccn58024.2023.10230150\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 32nd International Conference on Computer Communications and Networks (ICCCN)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/icccn58024.2023.10230150","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hardware Controller and Simulator for $log_{2}N$ Switching Fabrics
This paper presents the idea of a hardware controller for a switching fabric of $log_{2}N$, where a complicated algorithm is implemented in the Xilinx FPGA Virtex5 chip. This implementation is time-efficient and allows for real control of network traffic for DCN/EON electrical and optical networks. Simulations and human-based analysis can also be performed using this design. It can serve as a calculating engine for SDN/OF networks. Three different boards with two types of Virtex5 FPGA chips from Xilinx were used as the hardware platform.