Implementation of High Speed and Low Area Extended Euclidean Inversion over Ternary Fields

Hardware implementation of the extended Euclidean algorithm (EEA) over ternary field introduces many challenges, include degree evaluations during and after each iteration of the algorithm. This paper presents a novel realization of the traditional EEA over ternary fields in a concurrent manner, resolving the issues stated above by using a former systolic architectural approach. Polynomial division and multiplication in $GF(3^{m})$ are performed concurrently. Accordingly, an EEA-based ternary inverter is built. Then, the complexity of the proposed inverter is analyzed in comparison with efficient designs in the literature, concluding that our design has the lowest area-time complexity.