一种采用0.35-/spl mu/m SOI CMOS技术的低功耗低中频DDPSK接收机

E. Zencir, M. Yuce, T. Huang, J. Marks, N. Dogan, W. Liu, E. Arvas
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引用次数: 0

摘要

采用0.35 μ m /spl μ m绝缘体上硅(SOI) CMOS技术实现了一种低功耗低中频双差动PSK接收机。低功耗前端允许以最小的功耗实现接收器。接收器工作在435 MHz射频。射频前端和基带测量表明,一个完全集成的低功耗低中频接收机,容忍大多普勒频移是可行的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A low-power low-IF DDPSK receiver in 0.35-/spl mu/m SOI CMOS technology
A low-power low-IF double differential PSK receiver is implemented in a 0.35-/spl mu/m silicon on insulator (SOI) CMOS technology. Low-power front-end allows the implementation of the receiver with minimal power consumption. The receiver operates at 435 MHz RF. RF front-end and baseband measurements show that a fully-integrated low-power low-IF receiver that tolerates large Doppler shift is feasible.
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