{"title":"LDO频率补偿压控电流源的分析与设计","authors":"Qiang Bian, Zushu Yan, Yuanfu Zhao, S. Yue","doi":"10.1109/EDSSC.2005.1635282","DOIUrl":null,"url":null,"abstract":"Using voltage controlled current source (VCCS) instead of electrical series resistance (ESR) of load capacitor to create a zero is a novel LDO frequency compensation scheme. This paper analyzes this compensation scheme, and reveals that the VCCS circuit conduces to the improvements of transient response and PSR performance of LDO. A new area compact VCCS circuit that has a nearly ideal performance in wide frequency spectrum up to 5MHzis also presented. Using VCCS, a LDO with 300mV dropout, 2.5V output voltage and l00mA output current is designed in 0.5μm CMOS technology with pretty frequency performance, transient response and PSR performance. The total on-chip capacitor employed in this LDO is less than 1pF.","PeriodicalId":429314,"journal":{"name":"2005 IEEE Conference on Electron Devices and Solid-State Circuits","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Analysis and Design of Voltage Controlled Current Source for LDO Frequency Compensation\",\"authors\":\"Qiang Bian, Zushu Yan, Yuanfu Zhao, S. Yue\",\"doi\":\"10.1109/EDSSC.2005.1635282\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Using voltage controlled current source (VCCS) instead of electrical series resistance (ESR) of load capacitor to create a zero is a novel LDO frequency compensation scheme. This paper analyzes this compensation scheme, and reveals that the VCCS circuit conduces to the improvements of transient response and PSR performance of LDO. A new area compact VCCS circuit that has a nearly ideal performance in wide frequency spectrum up to 5MHzis also presented. Using VCCS, a LDO with 300mV dropout, 2.5V output voltage and l00mA output current is designed in 0.5μm CMOS technology with pretty frequency performance, transient response and PSR performance. The total on-chip capacitor employed in this LDO is less than 1pF.\",\"PeriodicalId\":429314,\"journal\":{\"name\":\"2005 IEEE Conference on Electron Devices and Solid-State Circuits\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 IEEE Conference on Electron Devices and Solid-State Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDSSC.2005.1635282\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE Conference on Electron Devices and Solid-State Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2005.1635282","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analysis and Design of Voltage Controlled Current Source for LDO Frequency Compensation
Using voltage controlled current source (VCCS) instead of electrical series resistance (ESR) of load capacitor to create a zero is a novel LDO frequency compensation scheme. This paper analyzes this compensation scheme, and reveals that the VCCS circuit conduces to the improvements of transient response and PSR performance of LDO. A new area compact VCCS circuit that has a nearly ideal performance in wide frequency spectrum up to 5MHzis also presented. Using VCCS, a LDO with 300mV dropout, 2.5V output voltage and l00mA output current is designed in 0.5μm CMOS technology with pretty frequency performance, transient response and PSR performance. The total on-chip capacitor employed in this LDO is less than 1pF.