{"title":"通过绕过SPIR-V,简化提前SYCL CPU设备实现","authors":"Wenju He, Yilong Guo, Xinmin Tian, Hideki Saito, Wenwan Xing, Feng Zou, Chunyang Dai, Maosu Zhao, Haonan Yang","doi":"10.1145/3585341.3585381","DOIUrl":null,"url":null,"abstract":"Here we present the design and implementation of our LLVM-based Ahead-Of-Time (AOT) SYCL CPU device without using SPIR-V, known as non-SPIRV CPU device. Our design of non-SPIRV CPU device is intended to highlight a general SYCL CPU implementation that aims for both debuggability and performance. Contributions: • Streamline compiler optimization pipeline by integrating kernel optimizations and transformations into LLVM C++ pipeline. • Eliminate SPIR-V IR generation during the CPU device code compilation and leverage LLVM IR from compiler front-end directly to reduce compilation overhead and preserve IR information including debug info, among LLVM passes.","PeriodicalId":360830,"journal":{"name":"Proceedings of the 2023 International Workshop on OpenCL","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Streamline Ahead-of-Time SYCL CPU Device Implementation through Bypassing SPIR-V\",\"authors\":\"Wenju He, Yilong Guo, Xinmin Tian, Hideki Saito, Wenwan Xing, Feng Zou, Chunyang Dai, Maosu Zhao, Haonan Yang\",\"doi\":\"10.1145/3585341.3585381\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Here we present the design and implementation of our LLVM-based Ahead-Of-Time (AOT) SYCL CPU device without using SPIR-V, known as non-SPIRV CPU device. Our design of non-SPIRV CPU device is intended to highlight a general SYCL CPU implementation that aims for both debuggability and performance. Contributions: • Streamline compiler optimization pipeline by integrating kernel optimizations and transformations into LLVM C++ pipeline. • Eliminate SPIR-V IR generation during the CPU device code compilation and leverage LLVM IR from compiler front-end directly to reduce compilation overhead and preserve IR information including debug info, among LLVM passes.\",\"PeriodicalId\":360830,\"journal\":{\"name\":\"Proceedings of the 2023 International Workshop on OpenCL\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-04-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2023 International Workshop on OpenCL\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/3585341.3585381\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2023 International Workshop on OpenCL","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3585341.3585381","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Streamline Ahead-of-Time SYCL CPU Device Implementation through Bypassing SPIR-V
Here we present the design and implementation of our LLVM-based Ahead-Of-Time (AOT) SYCL CPU device without using SPIR-V, known as non-SPIRV CPU device. Our design of non-SPIRV CPU device is intended to highlight a general SYCL CPU implementation that aims for both debuggability and performance. Contributions: • Streamline compiler optimization pipeline by integrating kernel optimizations and transformations into LLVM C++ pipeline. • Eliminate SPIR-V IR generation during the CPU device code compilation and leverage LLVM IR from compiler front-end directly to reduce compilation overhead and preserve IR information including debug info, among LLVM passes.