基于opencl的YOLOv2可扩展FPGA加速器

2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) Pub Date : 2019-04-01 DOI:10.1109/FCCM.2019.00058

Ke Xu, Xiaoyun Wang, Dong Wang

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引用次数: 9

摘要

本文在Arria-10 GX1150 FPGA板上实现了基于opencl的YOLOv2加速卡。硬件架构采用可扩展的管道设计，支持多分辨率输入图像，并通过全8位定点计算和CONV+BN+Leaky-ReLU层融合技术提高资源利用率。提出的设计在190 MHz工作频率下实现了566 GOPs的峰值吞吐量。该加速器可以分别以35 FPS和71 FPS的速度运行输入分辨率为288×288的YOLOv2推理和输入分辨率为416×416的微型YOLOv2推理。

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A Scalable OpenCL-Based FPGA Accelerator for YOLOv2

This paper implements an OpenCL-based FPGA accelerator for YOLOv2 on Arria-10 GX1150 FPGA board. The hardware architecture adopts a scalable pipeline design to support multi-resolution input image, and improves resource utilization by full 8-bit fixed-point computation and CONV+BN+Leaky-ReLU layer fusion technology. The proposed design achieves a peak throughput of 566 GOPs under 190 MHz working frequency. The accelerator could run YOLOv2 inference with 288×288 input resolution and tiny YOLOv2 with 416×416 input resolution at the speed of 35 and 71 FPS, respectively.

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2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)

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