{"title":"有效D类放大器的多相PWM信号发生器模型设计","authors":"I. A. Volkov, V. Priputin, E. A. Liberman","doi":"10.1109/IEEECONF53456.2022.9744291","DOIUrl":null,"url":null,"abstract":"This article describes the design of a multiphase pulse width modulation (PWM) signal generator model for use in a high-performance class D switching amplifier. Sigma-delta modulation (SDM) is used for additional mathematical processing. In this article architecture of proposed generator model and operation principles of each block are described. The influence of the order of the SDM and the number of phases of the multiphase PWM on the characteristics of the signal at the amplifier output using the developed model is investigated. It also considers the relationship between the clock frequencies of individual blocks, depending on the sampling rate of the input digital signal.","PeriodicalId":247774,"journal":{"name":"2022 Systems of Signals Generating and Processing in the Field of on Board Communications","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Multiphase PWM Signal Generator Model Design for Effective Class D Amplifier\",\"authors\":\"I. A. Volkov, V. Priputin, E. A. Liberman\",\"doi\":\"10.1109/IEEECONF53456.2022.9744291\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This article describes the design of a multiphase pulse width modulation (PWM) signal generator model for use in a high-performance class D switching amplifier. Sigma-delta modulation (SDM) is used for additional mathematical processing. In this article architecture of proposed generator model and operation principles of each block are described. The influence of the order of the SDM and the number of phases of the multiphase PWM on the characteristics of the signal at the amplifier output using the developed model is investigated. It also considers the relationship between the clock frequencies of individual blocks, depending on the sampling rate of the input digital signal.\",\"PeriodicalId\":247774,\"journal\":{\"name\":\"2022 Systems of Signals Generating and Processing in the Field of on Board Communications\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-03-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 Systems of Signals Generating and Processing in the Field of on Board Communications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEEECONF53456.2022.9744291\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 Systems of Signals Generating and Processing in the Field of on Board Communications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEEECONF53456.2022.9744291","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Multiphase PWM Signal Generator Model Design for Effective Class D Amplifier
This article describes the design of a multiphase pulse width modulation (PWM) signal generator model for use in a high-performance class D switching amplifier. Sigma-delta modulation (SDM) is used for additional mathematical processing. In this article architecture of proposed generator model and operation principles of each block are described. The influence of the order of the SDM and the number of phases of the multiphase PWM on the characteristics of the signal at the amplifier output using the developed model is investigated. It also considers the relationship between the clock frequencies of individual blocks, depending on the sampling rate of the input digital signal.