电荷域逻辑(CDL)的尝试

Koichi Itoh, Masashi Yamazaki, S. Nakamura, Y. Nagazumi
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引用次数: 0

摘要

介绍了电荷域逻辑的应用实例。为了研究电荷域逻辑的特性和可能性,利用标准CMOS设计了全加法器和CRC检查器的原型实现,并采用MOSIS 1.5 mum双重叠poly和双金属技术制作。这些应用设计需要少于8步的电荷转移,因此不需要特殊的制造工艺。文中还包括了两种设计的部分评价实验结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An Attempt Towards Charge-Domain Logic (CDL)
Application examples of charge-domain logic are described. To investigate the characteristics and possibilities of charge-domain logic, prototype implementations are made for full adder and CRC checker designs by standard CMOS, and fabricated by MOSIS 1.5 mum double overlapping poly, and double metal technology. Those application designs require less than 8 steps of charge transfer so that no special fabrication process is required. Some of the results from evaluation experiment for both designs are also included.
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