Zadoff-Chu序列同步系统性能与技术不平衡

A. Timoshenko, Ksenia Molenkamp, Niek B. Molenkamp, Anastasiia Pylkova
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摘要

在现代LTE系统中,Zadoff-Chu序列被用来传输同步信号。复杂序列在同相(I)和正交(Q)通道中传输,其精度取决于器件参数的技术不匹配。所使用的序列对现有的通信系统设置了一系列限制。包括5G在内的新型和前瞻性通信系统的开发为硬件组件的设计人员设定了一项任务,即在采用当前制造技术的同时实现信号处理的性能限制。与技术规模相关的各种问题,例如使用新材料和优化功耗。但在现有的技术基础和设备条件下,无法解决同一工艺过程中同类型无源和有源元件的匹配精度问题。因此,由不匹配引起的限制被置于通信系统中的所有设备上。本文重点分析了在通信系统内部各要素和设备即I通道和q通道存在技术不平衡的情况下,具有Zadoff-Chu序列的同步系统的行为。同步系统分析包括对信号转换和处理过程中发生的线性和非线性效应的评估。分析了I通道和q通道中集成电路元件的相位和幅度失配问题。在此基础上,得到了失配对稳定时间和保持时间、误报警概率和同步信号未检测概率的影响。定义了同步系统参数技术不平衡时局部同胚映射的极限。根据所获得的结果,我们提出了在I通道和q通道中器件的电路和布局实现的几种措施。此外,评估了在有限的模数转换资源下恢复同步的可能性,其中每个序列元素的恢复精度受到ADC有效分辨率的限制。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Zadoff-Chu sequences synchronization system performance with technological imbalance
In the modern LTE systems the Zadoff-Chu sequences are being used to transmit the synchronization signal. The complex sequence is transmitted both in the in-phase (I) and quadrature (Q) channels, the precision of which depends on the technological mismatch of the devices' parameters. The used sequences set a series of limitations on the existed communication systems. The development of new and prospective communication systems, including 5G, sets a mission for designers of the hardware components to achieve the performance limits for signal processing while employing current manufacturing technologies. There are various issues connected with technological scaling, such as using new materials and optimization of power consumption. But the issue of match precision of same type of elements, both passive and active, within same technological process can't be solved with the current technological basis and equipment. Thus, the restrictions induced by the mismatch are laid upon all devices in the communications system. This article focuses on the analysis of behavior of a synchronization system with Zadoff-Chu sequences in the presence of technological imbalance of all elements and devices inside the communication system, namely, I- and Q-channels. Synchronization system analysis includes evaluation for linear and non-linear effects occurring during the signal conversion and processing. The phase and amplitude mismatch of integrated circuit elements in the I- and Q-channels was analyzed. Based on that analysis we obtained the influence of mismatch on settling and hold-up times, and on the false-alarm probability and the synchro-signal undetection probability. The limits of local homeomorphic mapping for technological imbalance of synchronization system parameters are defined. Based on the obtained results, we suggest several measures for circuit and layout implementation of devices in the I- and Q-channels. Additionally, an evaluation of the possibility of restoring synchronization with limited resources of analog-to-digital conversion is made, where the restoring accuracy of each sequence element is constrained by the effective resolution of ADC.
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