{"title":"可逆2补码转换器的量子成本优化设计","authors":"H. Maity, A. Biswas, Anita Pal, A. Bhattacharjee","doi":"10.1109/EDKCON.2018.8770220","DOIUrl":null,"url":null,"abstract":"In this paper, we have proposed a quantum cost optimized reversible 2's complement code converter (2SCCC) circuit using existing reversible logic gate. First, we have design a reversible controlled inverter using Feynman gate and then we have design the proposed code converter (2SCCC) circuit using Feynman gate and Peres gate. Finally, we have proposed the design of quantum cost optimized reversible 2's complement code converter. The quantum cost (QC), garbage output (GO), delay and constant input (CI) of the proposed 2's complement code converter circuits are 11, 1, 7 and 1 which is better w. r. t. previously reported results. The improvement % of quantum cost, garbage outputs, delay and constant inputs are 26.66 - 60.71 %, 0 - 92.3 %, 25 - 57.14 % and 0 - 83.33 %.","PeriodicalId":344143,"journal":{"name":"2018 IEEE Electron Devices Kolkata Conference (EDKCON)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Quantum Cost Optimized Design of Reversible 2's Complement Code Converter\",\"authors\":\"H. Maity, A. Biswas, Anita Pal, A. Bhattacharjee\",\"doi\":\"10.1109/EDKCON.2018.8770220\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we have proposed a quantum cost optimized reversible 2's complement code converter (2SCCC) circuit using existing reversible logic gate. First, we have design a reversible controlled inverter using Feynman gate and then we have design the proposed code converter (2SCCC) circuit using Feynman gate and Peres gate. Finally, we have proposed the design of quantum cost optimized reversible 2's complement code converter. The quantum cost (QC), garbage output (GO), delay and constant input (CI) of the proposed 2's complement code converter circuits are 11, 1, 7 and 1 which is better w. r. t. previously reported results. The improvement % of quantum cost, garbage outputs, delay and constant inputs are 26.66 - 60.71 %, 0 - 92.3 %, 25 - 57.14 % and 0 - 83.33 %.\",\"PeriodicalId\":344143,\"journal\":{\"name\":\"2018 IEEE Electron Devices Kolkata Conference (EDKCON)\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE Electron Devices Kolkata Conference (EDKCON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDKCON.2018.8770220\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Electron Devices Kolkata Conference (EDKCON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDKCON.2018.8770220","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Quantum Cost Optimized Design of Reversible 2's Complement Code Converter
In this paper, we have proposed a quantum cost optimized reversible 2's complement code converter (2SCCC) circuit using existing reversible logic gate. First, we have design a reversible controlled inverter using Feynman gate and then we have design the proposed code converter (2SCCC) circuit using Feynman gate and Peres gate. Finally, we have proposed the design of quantum cost optimized reversible 2's complement code converter. The quantum cost (QC), garbage output (GO), delay and constant input (CI) of the proposed 2's complement code converter circuits are 11, 1, 7 and 1 which is better w. r. t. previously reported results. The improvement % of quantum cost, garbage outputs, delay and constant inputs are 26.66 - 60.71 %, 0 - 92.3 %, 25 - 57.14 % and 0 - 83.33 %.