{"title":"封装中配电网与片上电感的电磁耦合","authors":"Bing-Heng Li, Yan Li, Erping Li","doi":"10.1109/piers55526.2022.9792784","DOIUrl":null,"url":null,"abstract":"Electromagnetic interference (EMI) is a growing concern in integrated circuits as the operating frequency of electronic devices increases rapidly. In this paper, the electromagnetic coupling mechanism between the power distribution network (PDN) and on-chip inductors in the package is discussed. The full-wave simulation software CST is employed to obtain noise voltages. For the two inductors placed symmetrically, the amplitudes of two voltages with opposite polarity induced by the inductors are not equal, so there is a net voltage on the PDN. In order to reduce the noise voltage, two approaches have been proposed. Designing the PDN with dual supply voltages and dual grounds (DSDG) can reduce the noise voltage by 86.3%. And etching metal layer 1st under the inductors can reduce the noise voltage by 35.0% while etching metal layers 1st, 2nd can reduce the noise voltage by 72.9%.","PeriodicalId":422383,"journal":{"name":"2022 Photonics & Electromagnetics Research Symposium (PIERS)","volume":"112 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Electromagnetic Coupling between Power Distribution Network and On-chip Inductors in Package\",\"authors\":\"Bing-Heng Li, Yan Li, Erping Li\",\"doi\":\"10.1109/piers55526.2022.9792784\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Electromagnetic interference (EMI) is a growing concern in integrated circuits as the operating frequency of electronic devices increases rapidly. In this paper, the electromagnetic coupling mechanism between the power distribution network (PDN) and on-chip inductors in the package is discussed. The full-wave simulation software CST is employed to obtain noise voltages. For the two inductors placed symmetrically, the amplitudes of two voltages with opposite polarity induced by the inductors are not equal, so there is a net voltage on the PDN. In order to reduce the noise voltage, two approaches have been proposed. Designing the PDN with dual supply voltages and dual grounds (DSDG) can reduce the noise voltage by 86.3%. And etching metal layer 1st under the inductors can reduce the noise voltage by 35.0% while etching metal layers 1st, 2nd can reduce the noise voltage by 72.9%.\",\"PeriodicalId\":422383,\"journal\":{\"name\":\"2022 Photonics & Electromagnetics Research Symposium (PIERS)\",\"volume\":\"112 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-04-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 Photonics & Electromagnetics Research Symposium (PIERS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/piers55526.2022.9792784\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 Photonics & Electromagnetics Research Symposium (PIERS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/piers55526.2022.9792784","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Electromagnetic Coupling between Power Distribution Network and On-chip Inductors in Package
Electromagnetic interference (EMI) is a growing concern in integrated circuits as the operating frequency of electronic devices increases rapidly. In this paper, the electromagnetic coupling mechanism between the power distribution network (PDN) and on-chip inductors in the package is discussed. The full-wave simulation software CST is employed to obtain noise voltages. For the two inductors placed symmetrically, the amplitudes of two voltages with opposite polarity induced by the inductors are not equal, so there is a net voltage on the PDN. In order to reduce the noise voltage, two approaches have been proposed. Designing the PDN with dual supply voltages and dual grounds (DSDG) can reduce the noise voltage by 86.3%. And etching metal layer 1st under the inductors can reduce the noise voltage by 35.0% while etching metal layers 1st, 2nd can reduce the noise voltage by 72.9%.