{"title":"脉冲耦合神经网络对图像时间序列的FPGA实现","authors":"Xinzhe Zang, Zhenbin Gao, Mengyuan Li, Xia Wang","doi":"10.1145/3277453.3277483","DOIUrl":null,"url":null,"abstract":"Pulse Coupled Neural Network (PCNN) is biologically inspired neural networks, which has a good application in image processing, such as segmentation, enhancement, recognition, edge detection and so on. This paper presents a general VHDL modeling of PCNN, that is targeted for FPGA implementation, and can also be used with advantage for ASIC. First, the basic PCNN theory model is analyzed; and then the detail designed of each sub-module of the hardware is given; at last, the VHDL model is proved by comparing the time series output from FPGA simulation and that from theoretical calculation of the same image. The FPGA hardware implementation may be considered a platform for further, extended implementations and easily expanded into various applications.","PeriodicalId":186835,"journal":{"name":"Proceedings of the 2018 International Conference on Electronics and Electrical Engineering Technology","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"FPGA Implementation of Pulse Coupled Neural Network on for Time Series of an Image\",\"authors\":\"Xinzhe Zang, Zhenbin Gao, Mengyuan Li, Xia Wang\",\"doi\":\"10.1145/3277453.3277483\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Pulse Coupled Neural Network (PCNN) is biologically inspired neural networks, which has a good application in image processing, such as segmentation, enhancement, recognition, edge detection and so on. This paper presents a general VHDL modeling of PCNN, that is targeted for FPGA implementation, and can also be used with advantage for ASIC. First, the basic PCNN theory model is analyzed; and then the detail designed of each sub-module of the hardware is given; at last, the VHDL model is proved by comparing the time series output from FPGA simulation and that from theoretical calculation of the same image. The FPGA hardware implementation may be considered a platform for further, extended implementations and easily expanded into various applications.\",\"PeriodicalId\":186835,\"journal\":{\"name\":\"Proceedings of the 2018 International Conference on Electronics and Electrical Engineering Technology\",\"volume\":\"59 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-09-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2018 International Conference on Electronics and Electrical Engineering Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/3277453.3277483\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2018 International Conference on Electronics and Electrical Engineering Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3277453.3277483","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
FPGA Implementation of Pulse Coupled Neural Network on for Time Series of an Image
Pulse Coupled Neural Network (PCNN) is biologically inspired neural networks, which has a good application in image processing, such as segmentation, enhancement, recognition, edge detection and so on. This paper presents a general VHDL modeling of PCNN, that is targeted for FPGA implementation, and can also be used with advantage for ASIC. First, the basic PCNN theory model is analyzed; and then the detail designed of each sub-module of the hardware is given; at last, the VHDL model is proved by comparing the time series output from FPGA simulation and that from theoretical calculation of the same image. The FPGA hardware implementation may be considered a platform for further, extended implementations and easily expanded into various applications.