M. Fujii, T. Maeda, Y. Ohno, M. Tokushima, M. Ishikawa, M. Fukaishi, H. Hida
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引用次数: 1
摘要
设计并制造了电源电压低至1.3 V的SCFL d - ff。通过优化电源跟随器的逻辑摆幅和电压漂移来降低电源电压。d - ff采用0.25 /spl μ m AlGaAs/InGaAs hjfet,工作速度高达10 Gbps,功耗低至19 mW。
An ultra low power AlGaAs/InGaAs HJFET SCFL circuit for 10 Gbps applications with 1.3 V supply voltage
SCFL D-FFs with supply voltage as low as 1.3 V are designed and fabricated. The supply voltage is decreased by optimizing the logic swing and the voltage shift in the source followers. The D-FFs, using 0.25 /spl mu/m AlGaAs/InGaAs HJFETs, operate at up to 10 Gbps, with power consumption as low as 19 mW.