Thawatchai Thongleam, S. Suwansawang, Varakorn Kasensuwan
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引用次数: 9
摘要
介绍了一种低压全差分CMOS运算放大器。电路的输入级采用体积驱动晶体管设计,输出级采用QFG晶体管技术连接到AB类操作。采用辅助的跨导前馈电路实现高增益和高共模比。该放大器采用0.18 μm CMOS工艺设计,并通过HSPICE验证。仿真结果显示了轨间输入和输出的波动。开环增益和相位裕度分别为70.6 dB和55°。最终,增益带宽积、CMRR和功耗分别为31.7 MHz (CL=20 pF)、158.8 dB (1khz)和220.35 μW。
Low-voltage high gain, high CMRR and rail-to-rail bulk-driven Op-amp using feedforward technique
A low voltage fully differential CMOS Op-amp is presented in this paper. The input stage of the circuit is designed using bulk-driven transistors while the output stage are connected in the class AB operation using by QFG transistors techniques. The auxiliary transconductance feedforward circuit are employed to circuit operate high gain and high CMRR. The proposed amplifier is designed using 0.18 μm CMOS technology, and verify by HSPICE. The simulation results show rail-to-rail input and output swings. The open-loop gain and phase margin are 70.6 dB and 55°. Eventually, the gain-bandwidth product, the CMRR, and the power consumption are 31.7 MHz (CL=20 pF), 158.8 dB (at 1 kHz) and 220.35 μW, respectively.