多核处理器性能测量的变化:n层应用的研究

Junhee Park, Qingyang Wang, D. Jayasinghe, Jack Li, Yasuhiko Kanemasa, Masazumi Matsubara, Daisaku Yokoyama, M. Kitsuregawa, C. Pu
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引用次数: 10

摘要

多核处理器的流行提出了一个问题,即应用程序是否能够有效地利用越来越多的核心来提供可预测的服务质量(QoS)。本文研究了多核处理器(MCP)内n层应用程序性能的水平可扩展性。通过对RUBBoS基准的广泛测量,我们发现了MCP中性能变化的一个主要来源:内核到虚拟cpu的映射可以显著降低片上缓存命中率,导致性能下降高达22%,而资源利用率没有明显变化。在我们通过修复MCP核心映射消除了这些变化之后,我们测量了三个主流管理程序(占主导地位的商业管理程序、Xen和KVM)对MCP内部水平可伸缩性的影响。在四核双处理器(总共8核)上,我们发现了管理程序之间一些有趣的相似点和不同点。类似的一个例子是,当运行仅浏览的cpu密集型工作负载时,非单调的可伸缩性趋势(吞吐量在4核以下增加,在4核以上减少)。这个问题可以追溯到CPU包的最后一级缓存的管理。管理程序之间的一个不同之处是它们在混合读/写、I/ o密集型工作负载中对写操作的处理。具体来说,商用Hypervisor能够提供比KVM高两倍以上的吞吐量。我们的测量表明,MCP缓存架构和管理程序的选择确实对应用程序可实现的效率和水平可伸缩性有影响。然而,尽管它们存在差异,但对于n层应用程序,所有这三种主流管理程序都难以实现超过4核的内部mcp水平可伸缩性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Variations in Performance Measurements of Multi-core Processors: A Study of n-Tier Applications
The prevalence of multi-core processors has raised the question of whether applications can use the increasing number of cores efficiently in order to provide predictable quality of service (QoS). In this paper, we study the horizontal scalability of n-tier application performance within a multicore processor (MCP). Through extensive measurements of the RUBBoS benchmark, we found one major source of performance variations within MCP: the mapping of cores to virtual CPUs can significantly lower on-chip cache hit ratio, causing performance drops of up to 22% without obvious changes in resource utilization. After we eliminated these variations by fixing the MCP core mapping, we measured the impact of three mainstream hypervisors (the dominant Commercial Hypervisor, Xen, and KVM) on intra-MCP horizontal scalability. On a quad-core dual-processor (total 8 cores), we found some interesting similarities and dissimilarities among the hypervisors. An example of similarities is a non-monotonic scalability trend (throughput increasing up to 4 cores and then decreasing for more than 4 cores) when running a browse-only CPU-intensive workload. This problem can be traced to the management of last level cache of CPU packages. An example of dissimilarities among hypervisors is their handling of write operations in mixed read/write, I/O-intensive workloads. Specifically, the Commercial Hypervisor is able to provide more than twice the throughput compared to KVM. Our measurements show that both MCP cache architecture and the choice of hypervisors indeed have an impact on the efficiency and horizontal scalability achievable by applications. However, despite their differences, all three mainstream hypervisors have difficulties with the intra-MCP horizontal scalability beyond 4 cores for n-tier applications.
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