{"title":"低功率170 MHz离散时间模拟FIR滤波器","authors":"Xiaodong Wang, R. Spencer","doi":"10.1109/CICC.1997.606575","DOIUrl":null,"url":null,"abstract":"A 170 MHz analog FIR filter operating from a single 3.3 V supply is described. The design has been fabricated in the HP 1.2 /spl mu/m CMOS process and has an area of 2.35 mm by 1.97 mm including bonding pads. This 9-tap filter dissipates 70 mW when operating at 170 MHz. The multipliers are implemented using MDAC's with 6-bit resolution.","PeriodicalId":111737,"journal":{"name":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"41","resultStr":"{\"title\":\"A low power 170 MHz discrete-time analog FIR filter\",\"authors\":\"Xiaodong Wang, R. Spencer\",\"doi\":\"10.1109/CICC.1997.606575\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 170 MHz analog FIR filter operating from a single 3.3 V supply is described. The design has been fabricated in the HP 1.2 /spl mu/m CMOS process and has an area of 2.35 mm by 1.97 mm including bonding pads. This 9-tap filter dissipates 70 mW when operating at 170 MHz. The multipliers are implemented using MDAC's with 6-bit resolution.\",\"PeriodicalId\":111737,\"journal\":{\"name\":\"Proceedings of CICC 97 - Custom Integrated Circuits Conference\",\"volume\":\"17 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-05-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"41\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of CICC 97 - Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1997.606575\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1997.606575","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low power 170 MHz discrete-time analog FIR filter
A 170 MHz analog FIR filter operating from a single 3.3 V supply is described. The design has been fabricated in the HP 1.2 /spl mu/m CMOS process and has an area of 2.35 mm by 1.97 mm including bonding pads. This 9-tap filter dissipates 70 mW when operating at 170 MHz. The multipliers are implemented using MDAC's with 6-bit resolution.
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