1.1 V 1ghz通信路由器，片上偏置，150nm CMOS

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) Pub Date : 2002-08-07 DOI:10.1109/ISSCC.2002.993040

Siva G. Narendra, Matthew Haycock, V. Govindarajulu, V. Erraguntla, H. Wilson, S. Vangal, Amaresh Pangal, Erik Seligman, Raj Nair, Ali Keshavarzi, B. Bloechel, G. Dermer, Randy Mooney, N. Borkar, S. Borkar, Vivek De Microprocessor

{"title":"1.1 V 1ghz通信路由器，片上偏置，150nm CMOS","authors":"Siva G. Narendra, Matthew Haycock, V. Govindarajulu, V. Erraguntla, H. Wilson, S. Vangal, Amaresh Pangal, Erik Seligman, Raj Nair, Ali Keshavarzi, B. Bloechel, G. Dermer, Randy Mooney, N. Borkar, S. Borkar, Vivek De Microprocessor","doi":"10.1109/ISSCC.2002.993040","DOIUrl":null,"url":null,"abstract":"A router chip, that incorporates on-chip forward body biasing capability with 2% area overhead, achieves 1 GHz operation at 1.1 V supply in a 150 nm logic technology, compared to 1.25 V required for the original design having no body bias. Switching power is 23% less and chip leakage is reduced by 3.5/spl times/ in standby mode by withdrawing forward bias.","PeriodicalId":423674,"journal":{"name":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","volume":"54 9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"70","resultStr":"{\"title\":\"1.1 V 1 GHz communications router with on-chip body bias in 150 nm CMOS\",\"authors\":\"Siva G. Narendra, Matthew Haycock, V. Govindarajulu, V. Erraguntla, H. Wilson, S. Vangal, Amaresh Pangal, Erik Seligman, Raj Nair, Ali Keshavarzi, B. Bloechel, G. Dermer, Randy Mooney, N. Borkar, S. Borkar, Vivek De Microprocessor\",\"doi\":\"10.1109/ISSCC.2002.993040\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A router chip, that incorporates on-chip forward body biasing capability with 2% area overhead, achieves 1 GHz operation at 1.1 V supply in a 150 nm logic technology, compared to 1.25 V required for the original design having no body bias. Switching power is 23% less and chip leakage is reduced by 3.5/spl times/ in standby mode by withdrawing forward bias.\",\"PeriodicalId\":423674,\"journal\":{\"name\":\"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)\",\"volume\":\"54 9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"70\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2002.993040\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2002.993040","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 70

摘要

一款集成了片上正向体偏置能力和2%面积开销的路由器芯片，采用150纳米逻辑技术，在1.1 V电源下实现了1 GHz的工作，而原始设计在没有体偏置的情况下需要1.25 V电源。开关功率减少23%，在待机模式下，通过撤销正向偏置，芯片泄漏减少3.5/spl倍。

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1.1 V 1 GHz communications router with on-chip body bias in 150 nm CMOS

A router chip, that incorporates on-chip forward body biasing capability with 2% area overhead, achieves 1 GHz operation at 1.1 V supply in a 150 nm logic technology, compared to 1.25 V required for the original design having no body bias. Switching power is 23% less and chip leakage is reduced by 3.5/spl times/ in standby mode by withdrawing forward bias.

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2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)

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