采用可重构计算的脉冲多普勒雷达

S. Sumeen, M. Mobien, M.I. Siddiqi
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引用次数: 3

摘要

如今,在各种信号处理应用中,使用雷达进行高级控制已成为一种必要,例如导航系统、飞机、汽车和其他传感设备。基于普通微处理器的雷达信号处理器消耗大量的处理能力和时间,因此我们提出了在由数字信号处理器(DSP)和FPGA组成的混合系统中实现动态可重构脉冲多普勒雷达,以执行线性调频,高斯噪声滤波,下变频,脉冲压缩(匹配滤波)和脉冲多普勒处理。允许用户修改范围和延迟,芯片上的可重构处理器帮助DSP(s)利用数字信号处理应用中发现的更多并行性,从而提高处理器的整体性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A pulse Doppler radar using reconfigurable computing
In a variety of signal processing applications, nowadays, the use of radar for advanced control has become a necessity, e.g., navigational systems, aircraft, automobiles and other sensing devices. A normal microprocessor based radar signal processor eats a lot of processing power and time so we have proposed the implementation of a dynamically reconfigurable pulsed Doppler radar in a mixed system comprising a digital signal processor (DSP) and FPGA to perform linear frequency modulation, Gaussian noise filtering, downconversion, pulse compression (matched filtering) and pulsed Doppler processing. Allowing the users to modify range and delay, the reconfigurable processor on-chip helps DSP(s) exploit more of the parallelism found in digital signal processing applications, thus improving the processor's overall performance.
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