Xiaohong Yuan, S. Aboughalyoun, D. Williamson, A. Nixon
{"title":"缓存存储器模拟器:比较研究","authors":"Xiaohong Yuan, S. Aboughalyoun, D. Williamson, A. Nixon","doi":"10.1109/SECON.2004.1287907","DOIUrl":null,"url":null,"abstract":"Many computer architecture and organization instructors are turning to simulators with visualization as teaching aids. Many simulators have already been developed and made freely available on the Internet. It is beneficial to document and organize these simulators to all instructors of computer architecture and organization courses to take full advantage of this time-saving resource conveniently. This paper describes and analyzes three cache memory simulators. These cache memory simulators can be used with the popular computer architecture and organization textbooks. Our document of these cache memory simulators and comparative evaluation of their usability may provide computer architecture instructors with insight in selecting appropriate cache memory simulators to satisfy their pedagogical needs.","PeriodicalId":324953,"journal":{"name":"IEEE SoutheastCon, 2004. Proceedings.","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Cache Memory Simulators: A Comparative Study\",\"authors\":\"Xiaohong Yuan, S. Aboughalyoun, D. Williamson, A. Nixon\",\"doi\":\"10.1109/SECON.2004.1287907\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Many computer architecture and organization instructors are turning to simulators with visualization as teaching aids. Many simulators have already been developed and made freely available on the Internet. It is beneficial to document and organize these simulators to all instructors of computer architecture and organization courses to take full advantage of this time-saving resource conveniently. This paper describes and analyzes three cache memory simulators. These cache memory simulators can be used with the popular computer architecture and organization textbooks. Our document of these cache memory simulators and comparative evaluation of their usability may provide computer architecture instructors with insight in selecting appropriate cache memory simulators to satisfy their pedagogical needs.\",\"PeriodicalId\":324953,\"journal\":{\"name\":\"IEEE SoutheastCon, 2004. Proceedings.\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-03-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE SoutheastCon, 2004. Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SECON.2004.1287907\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE SoutheastCon, 2004. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SECON.2004.1287907","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Many computer architecture and organization instructors are turning to simulators with visualization as teaching aids. Many simulators have already been developed and made freely available on the Internet. It is beneficial to document and organize these simulators to all instructors of computer architecture and organization courses to take full advantage of this time-saving resource conveniently. This paper describes and analyzes three cache memory simulators. These cache memory simulators can be used with the popular computer architecture and organization textbooks. Our document of these cache memory simulators and comparative evaluation of their usability may provide computer architecture instructors with insight in selecting appropriate cache memory simulators to satisfy their pedagogical needs.