周期时间为100ns的集成MOS晶体管联想存储系统

R. Igarashi, T. Yaita
{"title":"周期时间为100ns的集成MOS晶体管联想存储系统","authors":"R. Igarashi, T. Yaita","doi":"10.1145/1465482.1465565","DOIUrl":null,"url":null,"abstract":"Since the announcement of the development of a technique for using MOS transistor integrated circuits as associative memory cells, 128 words of 48 bits per word associative memory has been experimented and engineered.","PeriodicalId":127219,"journal":{"name":"AFIPS '67 (Spring)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1967-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"An integrated MOS transistor associative memory system with 100 ns cycle time\",\"authors\":\"R. Igarashi, T. Yaita\",\"doi\":\"10.1145/1465482.1465565\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Since the announcement of the development of a technique for using MOS transistor integrated circuits as associative memory cells, 128 words of 48 bits per word associative memory has been experimented and engineered.\",\"PeriodicalId\":127219,\"journal\":{\"name\":\"AFIPS '67 (Spring)\",\"volume\":\"86 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1967-04-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"AFIPS '67 (Spring)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/1465482.1465565\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"AFIPS '67 (Spring)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1465482.1465565","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

自从宣布开发出利用MOS晶体管集成电路作为联想存储器单元的技术以来,每字48位的128字联想存储器已经被实验和制造出来。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An integrated MOS transistor associative memory system with 100 ns cycle time
Since the announcement of the development of a technique for using MOS transistor integrated circuits as associative memory cells, 128 words of 48 bits per word associative memory has been experimented and engineered.
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