{"title":"一种创新的硬件描述语言及其对VHDL的翻译","authors":"Yanbing Li, M. Leeser","doi":"10.1109/ASPDAC.1995.486388","DOIUrl":null,"url":null,"abstract":"HML (Hardware ML) is an innovative hardware description language based on the functional programming language SML. HML is a high-order language with polymorphic types. It uses advanced type checking and type inference techniques. We have implemented an HML type checker and a translator to VHDL. We generate a synthesizable subset of VHDL and automatically infer types and interfaces. This paper gives an overview of HML and discusses its typechecking techniques and the translation from HML to VHDL. We present a non-restoring integer square-root example to illustrate the HML system.","PeriodicalId":119232,"journal":{"name":"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"37","resultStr":"{\"title\":\"HML: an innovative hardware description language and its translation to VHDL\",\"authors\":\"Yanbing Li, M. Leeser\",\"doi\":\"10.1109/ASPDAC.1995.486388\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"HML (Hardware ML) is an innovative hardware description language based on the functional programming language SML. HML is a high-order language with polymorphic types. It uses advanced type checking and type inference techniques. We have implemented an HML type checker and a translator to VHDL. We generate a synthesizable subset of VHDL and automatically infer types and interfaces. This paper gives an overview of HML and discusses its typechecking techniques and the translation from HML to VHDL. We present a non-restoring integer square-root example to illustrate the HML system.\",\"PeriodicalId\":119232,\"journal\":{\"name\":\"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-08-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"37\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASPDAC.1995.486388\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.1995.486388","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
HML: an innovative hardware description language and its translation to VHDL
HML (Hardware ML) is an innovative hardware description language based on the functional programming language SML. HML is a high-order language with polymorphic types. It uses advanced type checking and type inference techniques. We have implemented an HML type checker and a translator to VHDL. We generate a synthesizable subset of VHDL and automatically infer types and interfaces. This paper gives an overview of HML and discusses its typechecking techniques and the translation from HML to VHDL. We present a non-restoring integer square-root example to illustrate the HML system.