{"title":"基于定性方法的低功耗FinFET器件性能分析","authors":"Shekhar Verma, S. Tripathi, Mohinder Bassi","doi":"10.1109/DEVIC.2019.8783754","DOIUrl":null,"url":null,"abstract":"The introduction of Field Effect Transistor (FinFET) Technology played a leading contender in today microelectronics. FinFET structure allows to scale the device at sub-nanometer. Short channel effects can be suppressed by formation of ultra-thin fin in FinFET device. In this paper we compared the performance of the 20nm FinFET device by using different dielectric materials. We have considered only n-channel FinFET device. Simulation carried on the electron mobility, potential distribution, energy band of hole and electron, on-off current ratio (Ion/Ioff) and power dissipation of device with respect to the applied gate voltage. Mobility enhancement and higher current ratio (Ion/Ioff) is observed in proposed FinFET device having high k-dielectric material at lower voltage. This designed can be useful for low power applications due to low power dissipation. In high k-dielectric material, 1.41% improvement is observed in potential voltage with respect to low k- dielectric material when $\\mathbf{V}_{\\mathbf{gs}}$ at low voltage and 0.98% improvement is observed when $\\mathbf{V}_{\\mathbf{gs}}$ at high voltage. In high k- dielectric material 15% hike is observed in the energy conduction band as compared to low k-dielectric material when $\\mathbf{V}_{\\mathbf{gs}}$ at low voltage and 14% hike is observed when $\\mathbf{v}_{\\mathbf{gs}}$ at high voltage.","PeriodicalId":294095,"journal":{"name":"2019 Devices for Integrated Circuit (DevIC)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":"{\"title\":\"Performance Analysis of FinFET device Using Qualitative Approach for Low-Power applications\",\"authors\":\"Shekhar Verma, S. Tripathi, Mohinder Bassi\",\"doi\":\"10.1109/DEVIC.2019.8783754\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The introduction of Field Effect Transistor (FinFET) Technology played a leading contender in today microelectronics. FinFET structure allows to scale the device at sub-nanometer. Short channel effects can be suppressed by formation of ultra-thin fin in FinFET device. In this paper we compared the performance of the 20nm FinFET device by using different dielectric materials. We have considered only n-channel FinFET device. Simulation carried on the electron mobility, potential distribution, energy band of hole and electron, on-off current ratio (Ion/Ioff) and power dissipation of device with respect to the applied gate voltage. Mobility enhancement and higher current ratio (Ion/Ioff) is observed in proposed FinFET device having high k-dielectric material at lower voltage. This designed can be useful for low power applications due to low power dissipation. In high k-dielectric material, 1.41% improvement is observed in potential voltage with respect to low k- dielectric material when $\\\\mathbf{V}_{\\\\mathbf{gs}}$ at low voltage and 0.98% improvement is observed when $\\\\mathbf{V}_{\\\\mathbf{gs}}$ at high voltage. In high k- dielectric material 15% hike is observed in the energy conduction band as compared to low k-dielectric material when $\\\\mathbf{V}_{\\\\mathbf{gs}}$ at low voltage and 14% hike is observed when $\\\\mathbf{v}_{\\\\mathbf{gs}}$ at high voltage.\",\"PeriodicalId\":294095,\"journal\":{\"name\":\"2019 Devices for Integrated Circuit (DevIC)\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"18\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 Devices for Integrated Circuit (DevIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DEVIC.2019.8783754\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 Devices for Integrated Circuit (DevIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DEVIC.2019.8783754","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Performance Analysis of FinFET device Using Qualitative Approach for Low-Power applications
The introduction of Field Effect Transistor (FinFET) Technology played a leading contender in today microelectronics. FinFET structure allows to scale the device at sub-nanometer. Short channel effects can be suppressed by formation of ultra-thin fin in FinFET device. In this paper we compared the performance of the 20nm FinFET device by using different dielectric materials. We have considered only n-channel FinFET device. Simulation carried on the electron mobility, potential distribution, energy band of hole and electron, on-off current ratio (Ion/Ioff) and power dissipation of device with respect to the applied gate voltage. Mobility enhancement and higher current ratio (Ion/Ioff) is observed in proposed FinFET device having high k-dielectric material at lower voltage. This designed can be useful for low power applications due to low power dissipation. In high k-dielectric material, 1.41% improvement is observed in potential voltage with respect to low k- dielectric material when $\mathbf{V}_{\mathbf{gs}}$ at low voltage and 0.98% improvement is observed when $\mathbf{V}_{\mathbf{gs}}$ at high voltage. In high k- dielectric material 15% hike is observed in the energy conduction band as compared to low k-dielectric material when $\mathbf{V}_{\mathbf{gs}}$ at low voltage and 14% hike is observed when $\mathbf{v}_{\mathbf{gs}}$ at high voltage.