{"title":"用于单片无线电的参考SAW石英硅振荡器的多片集成","authors":"Yeonwoo Ku, Y. Eo, K. Lee","doi":"10.1109/ISSCC.2002.992998","DOIUrl":null,"url":null,"abstract":"This presentation shows the feasibility of integrating a reference oscillator on CMOS circuits, using digitally temperature-compensated SAW oscillator and Polylithic IC technology on a quartz-on-silicon wafer. The oscillator shows -115 dBc/Hz phase noise at 10 kHz offset, 7.5 mW power consumption, and 4.5 ppm frequency stability.","PeriodicalId":423674,"journal":{"name":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","volume":"47 6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Polylithic integration of a reference SAW quartz-on-silicon oscillator for single-chip radio\",\"authors\":\"Yeonwoo Ku, Y. Eo, K. Lee\",\"doi\":\"10.1109/ISSCC.2002.992998\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This presentation shows the feasibility of integrating a reference oscillator on CMOS circuits, using digitally temperature-compensated SAW oscillator and Polylithic IC technology on a quartz-on-silicon wafer. The oscillator shows -115 dBc/Hz phase noise at 10 kHz offset, 7.5 mW power consumption, and 4.5 ppm frequency stability.\",\"PeriodicalId\":423674,\"journal\":{\"name\":\"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)\",\"volume\":\"47 6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2002.992998\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2002.992998","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Polylithic integration of a reference SAW quartz-on-silicon oscillator for single-chip radio
This presentation shows the feasibility of integrating a reference oscillator on CMOS circuits, using digitally temperature-compensated SAW oscillator and Polylithic IC technology on a quartz-on-silicon wafer. The oscillator shows -115 dBc/Hz phase noise at 10 kHz offset, 7.5 mW power consumption, and 4.5 ppm frequency stability.