{"title":"模拟缩放的基本限制","authors":"L. De Vito, M. Ishikawa","doi":"10.1109/VLSIC.1993.920558","DOIUrl":null,"url":null,"abstract":"Summary form only given. Rapid process enhancement and broad applicability of mixed-signal LSIs require shrinking the analog section to the same short development cycle time as the digital section. However, in contrast to digital, where a simple linear shrink works fine, there are many thorny issues to be considered for the analog shrink, such as noise, crosstalk, unwanted oscillation, and a variety of undesirable interactions.","PeriodicalId":127467,"journal":{"name":"Symposium 1993 on VLSI Circuits","volume":"3 6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fundamental limits to analog scaling\",\"authors\":\"L. De Vito, M. Ishikawa\",\"doi\":\"10.1109/VLSIC.1993.920558\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Summary form only given. Rapid process enhancement and broad applicability of mixed-signal LSIs require shrinking the analog section to the same short development cycle time as the digital section. However, in contrast to digital, where a simple linear shrink works fine, there are many thorny issues to be considered for the analog shrink, such as noise, crosstalk, unwanted oscillation, and a variety of undesirable interactions.\",\"PeriodicalId\":127467,\"journal\":{\"name\":\"Symposium 1993 on VLSI Circuits\",\"volume\":\"3 6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-05-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Symposium 1993 on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.1993.920558\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Symposium 1993 on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1993.920558","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Summary form only given. Rapid process enhancement and broad applicability of mixed-signal LSIs require shrinking the analog section to the same short development cycle time as the digital section. However, in contrast to digital, where a simple linear shrink works fine, there are many thorny issues to be considered for the analog shrink, such as noise, crosstalk, unwanted oscillation, and a variety of undesirable interactions.
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