自适应集粒度协同缓存

D. Rolán, B. Fraguela, R. Doallo
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引用次数: 13

摘要

当前的芯片多处理器(cmp)由多个核心、高速缓存存储器和互连网络组成。私有最后一级缓存(LLC)配置将LLC的静态部分分配给每个核心。这提供了较低的延迟和隔离,但代价是剥夺了系统重新分配未充分利用的资源的可能性。利用同一芯片中其他私有有限责任公司中未充分利用的资源的一种方法是使用相干机制来确定这些缓存的状态并向它们泄漏线路。此外,众所周知,内存引用并不是均匀地分布在集合关联缓存的各个集合上。因此,对缓存中的所有集合应用统一溢出策略可能不是最佳选择。本文提出了自适应集粒度协同缓存(ASCC),该方法在解决容量问题的同时,测量每个集的压力程度,并在溢出器和潜在接收集之间执行溢出。此外,它还增加了一个中性状态,以防止设备在可能有害的情况下成为溢出器或接收器。此外,我们提出了自适应变粒度协同缓存(AVGCC),它可以动态调整应用这些策略的粒度。这两种技术的存储开销都可以忽略不计,并且可以使用可扩展的结构适应许多核心环境。与4核CMP中的传统私有LLC配置相比,AVGCC的平均性能提高了7.8%,平均内存延迟降低了27%。最后,我们提出了AVGCC的扩展,以提供服务质量,将平均性能增益提高到8.1%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Adaptive Set-Granular Cooperative Caching
Current Chip Multiprocessors (CMPs) consist of several cores, cache memories and interconnection networks in the same chip. Private last level cache (LLC) configurations assign a static portion of the LLC to each core. This provides lower latency and isolation, at the cost of depriving the system of the possibility of reassigning underutilized resources. A way of taking advantage of underutilized resources in other private LLCs in the same chip is to use the coherence mechanism to determine the state of those caches and spill lines to them. Also, it is well known that memory references are not uniformly distributed across the sets of a set-associative cache. Therefore, applying a uniform spilling policy to all the sets in a cache may not be the best option. This paper proposes Adaptive Set-Granular Cooperative Caching (ASCC), which measures the degree of stress of each set and performs spills between spiller and potential receiver sets, while it tackles capacity problems. Also, it adds a neutral state to prevent sets from being either spillers or receivers when it could be harmful. Furthermore, we propose Adaptive Variable-Granularity Cooperative Caching (AVGCC), which dynamically adjusts the granularity for applying these policies. Both techniques have a negligible storage overhead and can adapt to many core environments using scalable structures. AVGCC improved average performance by 7.8% and reduced average memory latency by 27% related to a traditional private LLC configuration in a 4-core CMP. Finally, we propose an extension of AVGCC to provide Quality of Service that increases the average performance gain to 8.1%.
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