无线传感器网络低功耗5ghz频率合成器的设计

2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT) Pub Date : 2012-11-01 DOI:10.1109/RFIT.2012.6401669

Zhiqun Li, Q. Cao, Xiaodong Qi, Shuangshuang Zheng

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引用次数: 2

摘要

采用0.18μm CMOS技术设计并实现了用于WSN应用的全集成5 ghz锁相环频率合成器。采用自动电流校准技术(automatic current calibration technology, ACC)， VCO在0.3mA的小电流消耗下仍能保持良好的工作性能。分频器采用相开关技术来降低功耗。在1.8V电源电压下，测量功耗为12mW，相位噪声为-111.13dBc/Hz。

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Design of a low power 5-GHz frequency synthesizer for WSN applications

A fully integrated 5-GHz PLL frequency synthesizer for WSN applications has been designed and implemented in 0.18μm CMOS technology. With automatic current calibration technique (ACC), the VCO could maintain a good performance under a small current consumption of about 0.3mA. Phase switching technique is used in the frequency divider to reduce power consumption. Using a 1.8V supply voltage, the measured power consumption is 12mW and the phase noise is -111.13dBc/Hz at 1MHz offset.

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2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)

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